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| Presentation | 2011-10-21 09:30 Dependability evaluation of processor using the dependable SRAM by system-level fault injection Yusuke Takeuchi, Yohei Nakata (Kobe Univ.), Yasuhiro Ito, Yasuo Sugure, Shigeru Oho (Hitachi), Shunsuke Okumura, Hiroshi Kawaguchi (Kobe Univ.), Masahiko Yoshimoto (Kobe Univ./JST)  CPSY2011-25 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We propose a fault-injection system (FIS) that can inject faults such as read/write margin failures and soft errors into a SRAM environment. The fault case generator (FCG) generates time-series SRAM failures in 7T/14T or 6T SRAM, and the proposed device model and fault injection flow are applicable for system-level verification. For evaluation, an abnormal termination rate in vehicle engine control was adopted. We confirmed that the vehicle engine control system with the 7T/14T SRAM improves system-level dependability compared with the conventional 6T SRAM. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | fault injection / SRAM / system-level verification / dependable processor / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 111, no. 255, CPSY2011-25, pp. 1-6, Oct. 2011. | |
| Paper # | CPSY2011-25 | |
| Date of Issue | 2011-10-14 (CPSY) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2011-25 |
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| Conference Information | |
| Committee | CPSY |
| Conference Date | 2011-10-21 - 2011-10-21 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | CPSY |
| Conference Code | 2011-10-CPSY |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Dependability evaluation of processor using the dependable SRAM by system-level fault injection |
| Sub Title (in English) | |
| Keyword(1) | fault injection |
| Keyword(2) | SRAM |
| Keyword(3) | system-level verification |
| Keyword(4) | dependable processor |
| Keyword(5) | |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yusuke Takeuchi |
| 1st Author's Affiliation | Kobe University (Kobe Univ.) |
| 2nd Author's Name | Yohei Nakata |
| 2nd Author's Affiliation | Kobe University (Kobe Univ.) |
| 3rd Author's Name | Yasuhiro Ito |
| 3rd Author's Affiliation | Hitachi (Hitachi) |
| 4th Author's Name | Yasuo Sugure |
| 4th Author's Affiliation | Hitachi (Hitachi) |
| 5th Author's Name | Shigeru Oho |
| 5th Author's Affiliation | Hitachi (Hitachi) |
| 6th Author's Name | Shunsuke Okumura |
| 6th Author's Affiliation | Kobe University (Kobe Univ.) |
| 7th Author's Name | Hiroshi Kawaguchi |
| 7th Author's Affiliation | Kobe University (Kobe Univ.) |
| 8th Author's Name | Masahiko Yoshimoto |
| 8th Author's Affiliation | Kobe University/JST (Kobe Univ./JST) |
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| Speaker | Author-1 |
| Date Time | 2011-10-21 09:30:00 |
| Presentation Time | 20 minutes |
| Registration for | CPSY |
| Paper # | CPSY2011-25 |
| Volume (vol) | vol.111 |
| Number (no) | no.255 |
| Page | pp.1-6 |
| #Pages | 6 |
| Date of Issue | 2011-10-14 (CPSY) |
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