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Paper Abstract and Keywords
Presentation 2011-10-21 15:05
White Noise Generation via Chaos from Phase-Locked Loops -- Simulation Study by LTspice --
Yuhei Chiba, Kyosuke Kato, Isao Imai, Tetsuro Endo (Meiji Univ.) CAS2011-57 NLP2011-84
Abstract (in Japanese) (See Japanese page) 
(in English) Phase-locked loops(PLLs) can generate chaos in some operating condition. In particular, the phase unbounded chaotic attractor of PLL is known to have flat spectrum like white noise, especially in low frequency region. In our previous report, we implemented such a chaotic PLL with flat spectrum by using a digital PLL having sawtooth phase detector waveform as well as the corresponding computer simulation. In this research, we use LT (Linear Technology) spice, an electronic circuit simulator, to realize an analog PLL having sinusoidal phase detector waveform and to perform higher frequency experiment. At first, we generate white noise up to 1kHz in low frequency setup, and on the basis of this result we easily realize a white noise with larger frequency range up to 10~100kHz.
Keyword (in Japanese) (See Japanese page) 
(in English) analog PLL / chaos / wideband / white noise / / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 243, NLP2011-84, pp. 141-146, Oct. 2011.
Paper # NLP2011-84 
Date of Issue 2011-10-13 (CAS, NLP) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee CAS NLP  
Conference Date 2011-10-20 - 2011-10-21 
Place (in Japanese) (See Japanese page) 
Place (in English) Shizuoka Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Circuit and System, etc. 
Paper Information
Registration To NLP 
Conference Code 2011-10-CAS-NLP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) White Noise Generation via Chaos from Phase-Locked Loops 
Sub Title (in English) Simulation Study by LTspice 
Keyword(1) analog PLL  
Keyword(2) chaos  
Keyword(3) wideband  
Keyword(4) white noise  
1st Author's Name Yuhei Chiba  
1st Author's Affiliation Meiji University (Meiji Univ.)
2nd Author's Name Kyosuke Kato  
2nd Author's Affiliation Meiji University (Meiji Univ.)
3rd Author's Name Isao Imai  
3rd Author's Affiliation Meiji University (Meiji Univ.)
4th Author's Name Tetsuro Endo  
4th Author's Affiliation Meiji University (Meiji Univ.)
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Date Time 2011-10-21 15:05:00 
Presentation Time 25 
Registration for NLP 
Paper # IEICE-CAS2011-57,IEICE-NLP2011-84 
Volume (vol) IEICE-111 
Number (no) no.242(CAS), no.243(NLP) 
Page pp.141-146 
#Pages IEICE-6 
Date of Issue IEICE-CAS-2011-10-13,IEICE-NLP-2011-10-13 

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