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Paper Abstract and Keywords
Presentation 2011-08-26 15:30
A Dynamic body-biased SRAM with Asymmetric Halo Implant MOSFETs
Makoto Yabuuchi, Yasumasa Tsukamoto, Hidehiro Fujiwara, Koji Maekawa, Motoshige Igarashi, Koji Nii (Renesas) SDM2011-93 ICD2011-61 Link to ES Tech. Rep. Archives: SDM2011-93 ICD2011-61
Abstract (in Japanese) (See Japanese page) 
(in English) In this paper, we propose an SRAM macro that realizes 0.5V operation by combining a device technique with simple design architecture. Regarding the device technique, we utilize asymmetric halo implant MOSFETs, which enables to enhance both the static noise margin and write margin of SRAM, simultaneously. As for the design technique, dynamic body-bias scheme which operates body bias dynamically is introduced to overcome the speed degradation due to lower supply voltage. Showing measured data fabricated on 45nm CMOS technology, we demonstrate a plausible scenario for achieving 0.5V operating SoC products.
Keyword (in Japanese) (See Japanese page) 
(in English) SRAM / Variation / Asymmetric MOSFET / Dynamic body bias / / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 188, ICD2011-61, pp. 115-120, Aug. 2011.
Paper # ICD2011-61 
Date of Issue 2011-08-18 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SDM2011-93 ICD2011-61 Link to ES Tech. Rep. Archives: SDM2011-93 ICD2011-61

Conference Information
Committee SDM ICD  
Conference Date 2011-08-25 - 2011-08-26 
Place (in Japanese) (See Japanese page) 
Place (in English) Toyama kenminkaikan 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Low voltage/low power techniques, novel devices, circuits, and applications 
Paper Information
Registration To ICD 
Conference Code 2011-08-SDM-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Dynamic body-biased SRAM with Asymmetric Halo Implant MOSFETs 
Sub Title (in English)  
Keyword(1) SRAM  
Keyword(2) Variation  
Keyword(3) Asymmetric MOSFET  
Keyword(4) Dynamic body bias  
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1st Author's Name Makoto Yabuuchi  
1st Author's Affiliation Renesas Electronics Corporation (Renesas)
2nd Author's Name Yasumasa Tsukamoto  
2nd Author's Affiliation Renesas Electronics Corporation (Renesas)
3rd Author's Name Hidehiro Fujiwara  
3rd Author's Affiliation Renesas Electronics Corporation (Renesas)
4th Author's Name Koji Maekawa  
4th Author's Affiliation Renesas Electronics Corporation (Renesas)
5th Author's Name Motoshige Igarashi  
5th Author's Affiliation Renesas Electronics Corporation (Renesas)
6th Author's Name Koji Nii  
6th Author's Affiliation Renesas Electronics Corporation (Renesas)
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Speaker
Date Time 2011-08-26 15:30:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-SDM2011-93,IEICE-ICD2011-61 
Volume (vol) IEICE-111 
Number (no) no.187(SDM), no.188(ICD) 
Page pp.115-120 
#Pages IEICE-6 
Date of Issue IEICE-SDM-2011-08-18,IEICE-ICD-2011-08-18 


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