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Paper Abstract and Keywords
Presentation 2011-07-04 15:40
Hf and La upward diffusion into TiN electrode in TiN/HfLaSiO/SiO2 gate stacks induced by high-temperature annealing and its suppression with MIPS structure
Yuki Odake, Hiroaki Arimura, Masayuki Saeki, Keisuke Chikaraishi, Naomu Kitano, Takuji Hosoi, Takayoshi Shimura, Heiji Watanabe (Osaka Univ.) SDM2011-65 Link to ES Tech. Rep. Archives: SDM2011-65
Abstract (in Japanese) (See Japanese page) 
(in English) We investigated Hf and La upward diffusion in TiN/HfLaSiO/SiO2 gate stacks by means of electrical characterization and XPS analysis. TiN/HfLaSiO/SiO2 gate stacks annealed at temperatures above 900℃ show an increase in EOT due to the SiO2 growth and Hf and La diffusion into the TiN electrode. In contrast, poly-Si/TiN/HfLaSiO/SiO2 gate stacks maintain thin EOT of around 1 nm and suppress the Hf and La upward diffusion. To clarify the origin of the Hf and La upward diffusion, we also fabricated poly-Si/TiON/HfSiO/SiO2 gate stacks and revealed that SiO2 growth during high-temperature annealing induces Hf and La upward diffusion.
Keyword (in Japanese) (See Japanese page) 
(in English) High-k Gate Dielectrics / Metal Electrodes / Thermal Diffusion / XPS / HfSiO / HfLaSiO / TiN / MIPS  
Reference Info. IEICE Tech. Rep., vol. 111, no. 114, SDM2011-65, pp. 87-92, July 2011.
Paper # SDM2011-65 
Date of Issue 2011-06-27 (SDM) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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Download PDF SDM2011-65 Link to ES Tech. Rep. Archives: SDM2011-65

Conference Information
Committee SDM  
Conference Date 2011-07-04 - 2011-07-04 
Place (in Japanese) (See Japanese page) 
Place (in English) VBL, Nagoya Univ. 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Science and Technology for Dielectric Thin Films for Electron Devices 
Paper Information
Registration To SDM 
Conference Code 2011-07-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Hf and La upward diffusion into TiN electrode in TiN/HfLaSiO/SiO2 gate stacks induced by high-temperature annealing and its suppression with MIPS structure 
Sub Title (in English)  
Keyword(1) High-k Gate Dielectrics  
Keyword(2) Metal Electrodes  
Keyword(3) Thermal Diffusion  
Keyword(4) XPS  
Keyword(5) HfSiO  
Keyword(6) HfLaSiO  
Keyword(7) TiN  
Keyword(8) MIPS  
1st Author's Name Yuki Odake  
1st Author's Affiliation Osaka University (Osaka Univ.)
2nd Author's Name Hiroaki Arimura  
2nd Author's Affiliation Osaka University (Osaka Univ.)
3rd Author's Name Masayuki Saeki  
3rd Author's Affiliation Osaka University (Osaka Univ.)
4th Author's Name Keisuke Chikaraishi  
4th Author's Affiliation Osaka University (Osaka Univ.)
5th Author's Name Naomu Kitano  
5th Author's Affiliation Osaka University (Osaka Univ.)
6th Author's Name Takuji Hosoi  
6th Author's Affiliation Osaka University (Osaka Univ.)
7th Author's Name Takayoshi Shimura  
7th Author's Affiliation Osaka University (Osaka Univ.)
8th Author's Name Heiji Watanabe  
8th Author's Affiliation Osaka University (Osaka Univ.)
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Speaker
Date Time 2011-07-04 15:40:00 
Presentation Time 20 
Registration for SDM 
Paper # IEICE-SDM2011-65 
Volume (vol) IEICE-111 
Number (no) no.114 
Page pp.87-92 
#Pages IEICE-6 
Date of Issue IEICE-SDM-2011-06-27 


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