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Paper Abstract and Keywords
Presentation 2011-04-19 10:55
0.5-V FinFET SRAM Using Dynamic-Threshold-Voltage Pass Gates
Shin-ichi O'uchi, Kazuhiko Endo, Yongxun Liu, Takashi Matsukawa, Tadashi Nakagawa, Yuki Ishikawa, Junichi Tsukada, Hiromi Yamauchi, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara (AIST) ICD2011-11 Link to ES Tech. Rep. Archives: ICD2011-11
Abstract (in Japanese) (See Japanese page) 
(in English) This article presents a FinFET SRAM which salvages malfunctioned bits caused by random variation. In the presenting SRAM array, pass gates (PGs) of a 6-transistor SRAM cell consist of tunable-threshold-voltage (Vt) FinFETs. The Vt of those PGs is gradually lowered from a initial value during the read process. Once a datum is detected from a sense amplifier, the Vt is restored to the initial value. By this dynamic threshold-voltage control of PGs, the best Vt for each cell is automatically chosen, and the trade-off relationship between read speed and read margin is optimized in each cell. This technique is effective to reduce supply voltage in a scaled process. The experimental and simulation results suggest that this technique will enable 0.5V operation at read delay within 2ns in an Lg-20nm low-standby-power (LSTP) technology
Keyword (in Japanese) (See Japanese page) 
(in English) variable-tthreshold-voltage FinFET / 6T-SRAM / random variation / SNM / / / /  
Reference Info. IEICE Tech. Rep., vol. 111, no. 6, ICD2011-11, pp. 59-63, April 2011.
Paper # ICD2011-11 
Date of Issue 2011-04-11 (ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ICD2011-11 Link to ES Tech. Rep. Archives: ICD2011-11

Conference Information
Committee ICD  
Conference Date 2011-04-18 - 2011-04-19 
Place (in Japanese) (See Japanese page) 
Place (in English) Kobe University Takigawa Memorial Hall 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Memory Device Technologies 
Paper Information
Registration To ICD 
Conference Code 2011-04-ICD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) 0.5-V FinFET SRAM Using Dynamic-Threshold-Voltage Pass Gates 
Sub Title (in English)  
Keyword(1) variable-tthreshold-voltage FinFET  
Keyword(2) 6T-SRAM  
Keyword(3) random variation  
Keyword(4) SNM  
Keyword(5)  
Keyword(6)  
Keyword(7)  
Keyword(8)  
1st Author's Name Shin-ichi O'uchi  
1st Author's Affiliation National Institute of AIST (AIST)
2nd Author's Name Kazuhiko Endo  
2nd Author's Affiliation National Institute of AIST (AIST)
3rd Author's Name Yongxun Liu  
3rd Author's Affiliation National Institute of AIST (AIST)
4th Author's Name Takashi Matsukawa  
4th Author's Affiliation National Institute of AIST (AIST)
5th Author's Name Tadashi Nakagawa  
5th Author's Affiliation National Institute of AIST (AIST)
6th Author's Name Yuki Ishikawa  
6th Author's Affiliation National Institute of AIST (AIST)
7th Author's Name Junichi Tsukada  
7th Author's Affiliation National Institute of AIST (AIST)
8th Author's Name Hiromi Yamauchi  
8th Author's Affiliation National Institute of AIST (AIST)
9th Author's Name Toshihiro Sekigawa  
9th Author's Affiliation National Institute of AIST (AIST)
10th Author's Name Hanpei Koike  
10th Author's Affiliation National Institute of AIST (AIST)
11th Author's Name Kunihiro Sakamoto  
11th Author's Affiliation National Institute of AIST (AIST)
12th Author's Name Meishoku Masahara  
12th Author's Affiliation National Institute of AIST (AIST)
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Speaker
Date Time 2011-04-19 10:55:00 
Presentation Time 25 
Registration for ICD 
Paper # IEICE-ICD2011-11 
Volume (vol) IEICE-111 
Number (no) no.6 
Page pp.59-63 
#Pages IEICE-5 
Date of Issue IEICE-ICD-2011-04-11 


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