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| Presentation | 2011-03-02 17:00 [Fellow Memorial Lecture] Understanding CMOS Variability for More Moore Hidetoshi Onodera (Kyoto Univ./JST)  VLD2010-124 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | With the device dimensions in the nanometer regime, variability becomes a serious concern in LSI design. Aggressive scaling and increasing technology complexity lead to an explosion in the magnitude of variability while also introducing new sources of variability such as stress variation. The variability now becomes the primary obstacle for further scaling toward the More Moore direction. In this talk, we will review recent trend of CMOS variability. Other topics include variability characterization, minimization and mitigation. The CMOS variability in this talk mainly originates from fabrication processes and device structures, but dynamic and temporal variability such as RTN(Random Telegraph Noise) and BTI(Bias Temperature Instability) will be also touched on. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Variability / Design for Manufacturing / Statistical Design / RTN / BTI / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 110, no. 432, VLD2010-124, pp. 49-49, March 2011. | |
| Paper # | VLD2010-124 | |
| Date of Issue | 2011-02-23 (VLD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2010-124 |
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| Conference Information | |
| Committee | VLD |
| Conference Date | 2011-03-02 - 2011-03-04 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Okinawaken-Danjo-Kyodo-Sankaku Center |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Technology for System-on-Silicon |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2011-03-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Understanding CMOS Variability for More Moore |
| Sub Title (in English) | |
| Keyword(1) | Variability |
| Keyword(2) | Design for Manufacturing |
| Keyword(3) | Statistical Design |
| Keyword(4) | RTN |
| Keyword(5) | BTI |
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| 1st Author's Name | Hidetoshi Onodera |
| 1st Author's Affiliation | Kyoto University/JST CREST (Kyoto Univ./JST) |
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| Speaker | Author-1 |
| Date Time | 2011-03-02 17:00:00 |
| Presentation Time | 60 minutes |
| Registration for | VLD |
| Paper # | VLD2010-124 |
| Volume (vol) | vol.110 |
| Number (no) | no.432 |
| Page | p.49 |
| #Pages | 1 |
| Date of Issue | 2011-02-23 (VLD) |
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