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| Presentation | 2011-01-21 11:40 Acceleration of Block Matching by using Multiple Alignments on Heterogeneous Multi-Core Processor Yoshitaka Hiramatsu (Hitachi), Hasitha Muthumala Waidyasooriya, Masanori Hariyama (Tohoku Univ.), Tohru Nojiri, Kunio Uchiyama (Hitachi) Link to ES Tech. Rep. Archives:  ICD2010-136 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | The large data-transfer time among different cores and data-supply time to arithmetic unit is a big problem in heterogeneous multi-core processors. To reduce the data-supply time, an efficient method based on complex memory allocation was proposed. However, the data-transfer-modules cannot be used to accelerate the data transfer since the method does not use linear or stride data transfers. This paper presents a method by alignment in the data transfer and arithmetic processing respectively so that we can accelerate the data transfers exploiting data-transfer-units together with complex memory allocation. We use block matching to evaluate our technique. The proposed method reduces the data-transfer time by 42% compared to the method that use only complex memory allocation. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | block matching / heterogeneous multi-core / dynamically reconfigurable processor / data transfer / accelerator / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 110, no. 380, ICD2010-136, pp. 57-62, Jan. 2011. | |
| Paper # | ICD2010-136 | |
| Date of Issue | 2011-01-13 (ICD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | Link to ES Tech. Rep. Archives: ICD2010-136 |
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| Conference Information | |
| Committee | ICD IPSJ-ARC |
| Conference Date | 2011-01-20 - 2011-01-21 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Keio University (Hiyoshi Campus) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | ICD |
| Conference Code | 2011-01-ICD-ARC |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Acceleration of Block Matching by using Multiple Alignments on Heterogeneous Multi-Core Processor |
| Sub Title (in English) | |
| Keyword(1) | block matching |
| Keyword(2) | heterogeneous multi-core |
| Keyword(3) | dynamically reconfigurable processor |
| Keyword(4) | data transfer |
| Keyword(5) | accelerator |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yoshitaka Hiramatsu |
| 1st Author's Affiliation | Hitachi, Ltd., Central Research Laboratory (Hitachi) |
| 2nd Author's Name | Hasitha Muthumala Waidyasooriya |
| 2nd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 3rd Author's Name | Masanori Hariyama |
| 3rd Author's Affiliation | Tohoku University (Tohoku Univ.) |
| 4th Author's Name | Tohru Nojiri |
| 4th Author's Affiliation | Hitachi, Ltd., Central Research Laboratory (Hitachi) |
| 5th Author's Name | Kunio Uchiyama |
| 5th Author's Affiliation | Hitachi, Ltd., Central Research Laboratory (Hitachi) |
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| Speaker | Author-1 |
| Date Time | 2011-01-21 11:40:00 |
| Presentation Time | 30 minutes |
| Registration for | ICD |
| Paper # | ICD2010-136 |
| Volume (vol) | vol.110 |
| Number (no) | no.380 |
| Page | pp.57-62 |
| #Pages | 6 |
| Date of Issue | 2011-01-13 (ICD) |
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