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| Paper Abstract and Keywords | ||
| Presentation | 2011-01-18 16:25 Implementation and Evaluation of a Fast and Handy LCD Module Using an FPGA Naoki Fujieda, Kenji Kise (Tokyo Tech)  VLD2010-113 CPSY2010-68 RECONF2010-82 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | To output results of, or to debug, embedded systems, display modules which is easy to connect and shows much information are very useful. As one of such displays, we have developed a fast and handy LCD module using an FPGA. In this paper, we discuss the design, implementation, and evaluation of our module. We also show an example of our module embedded in other systems, using our processor prototyping system. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / Display Module / Embedded System / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 110, no. 362, RECONF2010-82, pp. 193-198, Jan. 2011. | |
| Paper # | RECONF2010-82 | |
| Date of Issue | 2011-01-10 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2010-113 CPSY2010-68 RECONF2010-82 |
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| Conference Information | |
| Committee | RECONF VLD CPSY IPSJ-SLDM |
| Conference Date | 2011-01-17 - 2011-01-18 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Keio Univ (Hiyoshi Campus) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2011-01-RECONF-VLD-CPSY-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation and Evaluation of a Fast and Handy LCD Module Using an FPGA |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Display Module |
| Keyword(3) | Embedded System |
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| 1st Author's Name | Naoki Fujieda |
| 1st Author's Affiliation | Tokyo Institute of Technology (Tokyo Tech) |
| 2nd Author's Name | Kenji Kise |
| 2nd Author's Affiliation | Tokyo Institute of Technology (Tokyo Tech) |
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| Speaker | Author-1 |
| Date Time | 2011-01-18 16:25:00 |
| Presentation Time | 20 minutes |
| Registration for | RECONF |
| Paper # | VLD2010-113, CPSY2010-68, RECONF2010-82 |
| Volume (vol) | vol.110 |
| Number (no) | no.360(VLD), no.361(CPSY), no.362(RECONF) |
| Page | pp.193-198 |
| #Pages | 6 |
| Date of Issue | 2011-01-10 (VLD, CPSY, RECONF) |
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