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| Presentation | 2011-01-17 13:50 A Heuristic Method using CODCs for Extraction of Maximum Observability Don't Care Set Taiga Takata, Yusuke Matsunaga (Kyushu Univ.)  VLD2010-91 CPSY2010-46 RECONF2010-60 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Sets of observability don't cares (ODCs) can be employed for multi-level logic optimization or propagation analysis of pulses assumed to be caused by soft errors. Larger set of ODCs is required to maximize the space of logic optimization or analyze pulse propagations more accurately. However, computing the maximum set of ODCs (MODC) consumes linear time for the square of a circuit scale. On the other hand, a set of compatible sets of ODCs (CODC) is known as a set of subsets of MODC which can be calculated in linear time for a circuit scale. CODC depends on a priority order for nodes which is determined during CODC computation. In a CODC, the ODC sets for a gate is often too small to be used as an approximate MODC. This paper shows a method to compute an approximate MODC for each node in linear time for a circuit scale. The method calculates several CODCs with variant priority orders, and calculates the union of CODCs as an approximate MODC. In experiments to estimate soft error rate of combinational circuits, the estimated soft error rate based on the approximate MODCs is only 3.4% larger than the exact soft error rate. Some improvements, however, are required for the proposed method to run in short run-time. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Logic optimization / Soft error / SEU / Don't care / CODC / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 110, no. 360, VLD2010-91, pp. 43-48, Jan. 2011. | |
| Paper # | VLD2010-91 | |
| Date of Issue | 2011-01-10 (VLD, CPSY, RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2010-91 CPSY2010-46 RECONF2010-60 |
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| Conference Information | |
| Committee | RECONF VLD CPSY IPSJ-SLDM |
| Conference Date | 2011-01-17 - 2011-01-18 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Keio Univ (Hiyoshi Campus) |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | FPGA Applications, etc |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2011-01-RECONF-VLD-CPSY-SLDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Heuristic Method using CODCs for Extraction of Maximum Observability Don't Care Set |
| Sub Title (in English) | |
| Keyword(1) | Logic optimization |
| Keyword(2) | Soft error |
| Keyword(3) | SEU |
| Keyword(4) | Don't care |
| Keyword(5) | CODC |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Taiga Takata |
| 1st Author's Affiliation | Kyushu University (Kyushu Univ.) |
| 2nd Author's Name | Yusuke Matsunaga |
| 2nd Author's Affiliation | Kyushu University (Kyushu Univ.) |
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| Speaker | Author-1 |
| Date Time | 2011-01-17 13:50:00 |
| Presentation Time | 20 minutes |
| Registration for | VLD |
| Paper # | VLD2010-91, CPSY2010-46, RECONF2010-60 |
| Volume (vol) | vol.110 |
| Number (no) | no.360(VLD), no.361(CPSY), no.362(RECONF) |
| Page | pp.43-48 |
| #Pages | 6 |
| Date of Issue | 2011-01-10 (VLD, CPSY, RECONF) |
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