IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2010-12-17 11:15
Monte Carlo Simulations of Nanogate In0.7Ga0.3As/InAs/In0.7Ga0.3As Composite Channel HEMTs
Akira Endoh (NICT/Fujitsu Labs.), Issei Watanabe (NICT), Takashi Mimura (Fujitsu Labs./NICT) ED2010-168 Link to ES Tech. Rep. Archives: ED2010-168
Abstract (in Japanese) (See Japanese page) 
(in English) To achieve high-speed operations of InP-based InAlAs/InGaAs HEMTs, an InGaAs/InAs/InGaAs composite layer is used as a channel. In this work, we carried out Monte Carlo (MC) simulations of In0.7Ga0.3As/InAs/In0.7Ga0.3As composite channel HEMTs and examined the effect of the channel structure on the device performance. The InAs layer with a thickness range from 2 to 8 nm was introduced into the In0.7Ga0.3As channel. Even for the InAs layer thickness of 2 nm, a twofold increase in the drain-source current Ids , transconductance gm and cutoff frequency fT was seen. With further increasing the InAs layer thickness, the increase of Ids, gm and fT was not so much. The increase in Ids, gm and fT mainly results from the increase in the electron velocity by introducing the InAs layer into the channel. On the other hand, the increase in the electron density by introducing the InAs layer was small. Furthermore, we fabricated composite channel HEMTs and compared their device performance with those of In0.7Ga0.3As channel HEMTs.
Keyword (in Japanese) (See Japanese page) 
(in English) In-based HEMTs / In0.7Ga0.3As/InAs/In0.7Ga0.3As / Composite channel / Monte Carlo simulations / Drain-source current / Transconductance / Cutoff frequency / Electron velocity  
Reference Info. IEICE Tech. Rep., vol. 110, no. 342, ED2010-168, pp. 59-64, Dec. 2010.
Paper # ED2010-168 
Date of Issue 2010-12-09 (ED) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF ED2010-168 Link to ES Tech. Rep. Archives: ED2010-168

Conference Information
Committee ED  
Conference Date 2010-12-16 - 2010-12-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Tohoku University (Research Institute of Electrical Communication) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Millimeter wave, terahertz devices and systems 
Paper Information
Registration To ED 
Conference Code 2010-12-ED 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Monte Carlo Simulations of Nanogate In0.7Ga0.3As/InAs/In0.7Ga0.3As Composite Channel HEMTs 
Sub Title (in English)  
Keyword(1) In-based HEMTs  
Keyword(2) In0.7Ga0.3As/InAs/In0.7Ga0.3As  
Keyword(3) Composite channel  
Keyword(4) Monte Carlo simulations  
Keyword(5) Drain-source current  
Keyword(6) Transconductance  
Keyword(7) Cutoff frequency  
Keyword(8) Electron velocity  
1st Author's Name Akira Endoh  
1st Author's Affiliation National Institute of Information and Communications Technology/Fujitsu Laboratories Ltd. (NICT/Fujitsu Labs.)
2nd Author's Name Issei Watanabe  
2nd Author's Affiliation National Institute of Information and Communications Technology (NICT)
3rd Author's Name Takashi Mimura  
3rd Author's Affiliation Fujitsu Laboratories Ltd./National Institute of Information and Communications Technology (Fujitsu Labs./NICT)
4th Author's Name  
4th Author's Affiliation ()
5th Author's Name  
5th Author's Affiliation ()
6th Author's Name  
6th Author's Affiliation ()
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Speaker Author-1 
Date Time 2010-12-17 11:15:00 
Presentation Time 25 minutes 
Registration for ED 
Paper # ED2010-168 
Volume (vol) vol.110 
Number (no) no.342 
Page pp.59-64 
#Pages
Date of Issue 2010-12-09 (ED) 


[Return to Top Page]

[Return to IEICE Web Page]


The Institute of Electronics, Information and Communication Engineers (IEICE), Japan