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Paper Abstract and Keywords
Presentation 2010-12-10 11:05
Hardware speech recognition system for processing and recognition at moment
Masashi Nakayama (KNCT), Naoki Shigekawa (Univ. of Fukui), Takashi Yokouchi (KNCT)
Abstract (in Japanese) (See Japanese page) 
(in English) In this paper, we are proposed the hardware speech recognition system using FPGA (Field-Programmable Gate Array). Generally, conventional speech recognition systems are often constructed on computers and microcomputers as software and middleware. We thought that speech recognition systems will be constructed on hardware in future because developments of speech recognition systems change software to software. For these backgrounds, we are proposed/constructed the hardware speech recognition system with speech processing for the treatments which has speech signal processing part and speech recognition part. And, we confirmed the effectiveness of the system that the system is composed of the VAD (Voice Activity Detection) detector using the effective duration time of 2nd autocorrelation and 2-pass vowel speech recognition decoder using outputs of frequency band power and spectral distances. 2nd autocorrelation is calculated from 1st autocorrelation with autocorrelation, and the decoder estimates the candidate using the frequency band power like filter bank and band-pass filter.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / speech recognition / voice activity detection / noise environment / autocorrelation / effective duration time / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 331, EA2010-99, pp. 13-18, Dec. 2010.
Paper # EA2010-99 
Date of Issue 2010-12-03 (EA) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380

Conference Information
Committee EA  
Conference Date 2010-12-10 - 2010-12-10 
Place (in Japanese) (See Japanese page) 
Place (in English) Univ. of Tsukuba 
Topics (in Japanese) (See Japanese page) 
Topics (in English) General Topics 
Paper Information
Registration To EA 
Conference Code 2010-12-EA 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Hardware speech recognition system for processing and recognition at moment 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) speech recognition  
Keyword(3) voice activity detection  
Keyword(4) noise environment  
Keyword(5) autocorrelation  
Keyword(6) effective duration time  
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Keyword(8)  
1st Author's Name Masashi Nakayama  
1st Author's Affiliation Kagawa National College of Technology (KNCT)
2nd Author's Name Naoki Shigekawa  
2nd Author's Affiliation University of Fukui (Univ. of Fukui)
3rd Author's Name Takashi Yokouchi  
3rd Author's Affiliation Kagawa National College of Technology (KNCT)
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Speaker
Date Time 2010-12-10 11:05:00 
Presentation Time 25 
Registration for EA 
Paper # IEICE-EA2010-99 
Volume (vol) IEICE-110 
Number (no) no.331 
Page pp.13-18 
#Pages IEICE-6 
Date of Issue IEICE-EA-2010-12-03 


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