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Paper Abstract and Keywords
Presentation 2010-11-30 10:25
[Invited Talk] System Performance Improvement Expected for 3D LSI Chip Stacking Integration Technology
Masahiro Aoyagi (AIST) CPM2010-134 ICD2010-93 Link to ES Tech. Rep. Archives: CPM2010-134 ICD2010-93
Abstract (in Japanese) (See Japanese page) 
(in English) 3D LSI chip stacking integration technology using through-Si-via is very promising for future electronic hardware integration technology. Latest research activity and system performance improvement expected for 3D LSI chip stacking integration technology are discussed.
Keyword (in Japanese) (See Japanese page) 
(in English) 3D / LSI / Chip / Stacking / System / TSV / SOC / SiP  
Reference Info. IEICE Tech. Rep., vol. 110, no. 314, CPM2010-134, pp. 61-65, Nov. 2010.
Paper # CPM2010-134 
Date of Issue 2010-11-22 (CPM, ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CPM2010-134 ICD2010-93 Link to ES Tech. Rep. Archives: CPM2010-134 ICD2010-93

Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2010-11-29 - 2010-12-01 
Place (in Japanese) (See Japanese page) 
Place (in English) Kyushu University 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2010 ―New Field of VLSI Design― 
Paper Information
Registration To CPM 
Conference Code 2010-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) System Performance Improvement Expected for 3D LSI Chip Stacking Integration Technology 
Sub Title (in English)  
Keyword(1) 3D  
Keyword(2) LSI  
Keyword(3) Chip  
Keyword(4) Stacking  
Keyword(5) System  
Keyword(6) TSV  
Keyword(7) SOC  
Keyword(8) SiP  
1st Author's Name Masahiro Aoyagi  
1st Author's Affiliation National Institute of Advanced Industrial Science and Technology (AIST)
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Speaker
Date Time 2010-11-30 10:25:00 
Presentation Time 40 
Registration for CPM 
Paper # IEICE-CPM2010-134,IEICE-ICD2010-93 
Volume (vol) IEICE-110 
Number (no) no.314(CPM), no.315(ICD) 
Page pp.61-65 
#Pages IEICE-5 
Date of Issue IEICE-CPM-2010-11-22,IEICE-ICD-2010-11-22 


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