Paper Abstract and Keywords |
Presentation |
2010-10-23 14:30
A ReRAM-based Analog Synaptic Device exhibiting Spike-Timing-Dependent Plasticity Nobuo Akou, Tetsuya Asai (Hokkaido Univ.), Takeshi Yanagida, Tomoji Kawai (Osaka Univ.), Yoshihito Amemiya (Hokkaido Univ.) NC2010-46 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
We propose a STDP synaptic device that employs a resistive RAM (ReRAM). The device is a CMOS-ReRAM-hybrid circuit that consists of a bipolar ReRAM, a capacitor, and two nMOS FETs. Through extensive experimentals of our prototype device, we demonstrate that i) transient characteristics of our ReRAM are qualitatively equivalent to characteristics of a mathematical model of memristors, ii) conductance of the ReRAM does not change when one applies voltage spikes to a CR circuit consisting of the ReRAM and a capacitor, iii) when the capacitor is discharged via an additional current path during the charge and discharge process in ii) above, conductance of the ReRAM is certainly increased, and iv) by combining properties of ii) and iii) above, conductance of our STDP device is certainly modulated (increased or held) by the input spike timing. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Neural device / resistive RAM (ReRAM) / memristor / synapse / STDP / / / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 246, NC2010-46, pp. 23-28, Oct. 2010. |
Paper # |
NC2010-46 |
Date of Issue |
2010-10-16 (NC) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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NC2010-46 |
Conference Information |
Committee |
NC |
Conference Date |
2010-10-23 - 2010-10-23 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kyushu Inst. Tech. (Kitakyushu Sci. and Res. Park) |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Implementation and Systemization of Neurocomputing |
Paper Information |
Registration To |
NC |
Conference Code |
2010-10-NC |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A ReRAM-based Analog Synaptic Device exhibiting Spike-Timing-Dependent Plasticity |
Sub Title (in English) |
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Keyword(1) |
Neural device |
Keyword(2) |
resistive RAM (ReRAM) |
Keyword(3) |
memristor |
Keyword(4) |
synapse |
Keyword(5) |
STDP |
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1st Author's Name |
Nobuo Akou |
1st Author's Affiliation |
Hokkaidou University (Hokkaido Univ.) |
2nd Author's Name |
Tetsuya Asai |
2nd Author's Affiliation |
Hokkaidou University (Hokkaido Univ.) |
3rd Author's Name |
Takeshi Yanagida |
3rd Author's Affiliation |
Osaka University (Osaka Univ.) |
4th Author's Name |
Tomoji Kawai |
4th Author's Affiliation |
Osaka University (Osaka Univ.) |
5th Author's Name |
Yoshihito Amemiya |
5th Author's Affiliation |
Hokkaidou University (Hokkaido Univ.) |
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Speaker |
Author-1 |
Date Time |
2010-10-23 14:30:00 |
Presentation Time |
25 minutes |
Registration for |
NC |
Paper # |
NC2010-46 |
Volume (vol) |
vol.110 |
Number (no) |
no.246 |
Page |
pp.23-28 |
#Pages |
6 |
Date of Issue |
2010-10-16 (NC) |
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