Paper Abstract and Keywords |
Presentation |
2010-10-05 13:20
Study of stacked NOR type MRAM using spin transistor Shouto Tamai, Shigeyoshi Watanabe (sit) SIP2010-55 ICD2010-69 IE2010-73 Link to ES Tech. Rep. Archives: ICD2010-69 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In this paper stacked NOR type MRAM with vertical spin transistor has been newly proposed. Word line scheme surrounded by vertical spin transistor enable to realize small cell size of 9F2 and fast random access time competitive to DRAM. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
non-volatile / MRAM / spin trnsistor / stacked NOR structure / universal memory / / / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 216, ICD2010-69, pp. 37-42, Oct. 2010. |
Paper # |
ICD2010-69 |
Date of Issue |
2010-09-28 (SIP, ICD, IE) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
SIP2010-55 ICD2010-69 IE2010-73 Link to ES Tech. Rep. Archives: ICD2010-69 |
Conference Information |
Committee |
IPSJ-SLDM SIP IE ICD |
Conference Date |
2010-10-05 - 2010-10-06 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Makuhari Messe, International Conference Hall |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Frontier of processor, DSP, and image processing supporting Digital Harmony |
Paper Information |
Registration To |
ICD |
Conference Code |
2010-10-SLDM-SIP-IE-ICD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Study of stacked NOR type MRAM using spin transistor |
Sub Title (in English) |
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Keyword(1) |
non-volatile |
Keyword(2) |
MRAM |
Keyword(3) |
spin trnsistor |
Keyword(4) |
stacked NOR structure |
Keyword(5) |
universal memory |
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1st Author's Name |
Shouto Tamai |
1st Author's Affiliation |
Shonan Institute of Technology (sit) |
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Shigeyoshi Watanabe |
2nd Author's Affiliation |
Shonan Institute of Technology (sit) |
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Speaker |
Author-1 |
Date Time |
2010-10-05 13:20:00 |
Presentation Time |
20 minutes |
Registration for |
ICD |
Paper # |
SIP2010-55, ICD2010-69, IE2010-73 |
Volume (vol) |
vol.110 |
Number (no) |
no.215(SIP), no.216(ICD), no.217(IE) |
Page |
pp.37-42 |
#Pages |
6 |
Date of Issue |
2010-09-28 (SIP, ICD, IE) |
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