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| Presentation | 2010-09-28 15:50 Modeling of Latching Probability of Soft-Error-Induced Pulse Motoharu Hirata, Masayoshi Yoshimura, Yusuke Matsunaga (Kyusyu Univ.)  VLD2010-56 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper describes soft error which is one of the dependability decrease factors of LSI(Large Scale Integrated circuit). Soft error is a phenomenon that the output value of a logic gate flips transiently or the preserved value of a storage element flips because of electric charge occurred by neutron particle strike at transistor. Designers of circuits should do soft error measures to judge whether the circuit has desired tolerance. It is necessary to calculate the probability that pulse propagated to the input of each flipflop (henceforth FF) is latched when we evaluate soft error tolerance. The latching probability of which parameter is pulse width was modeled in an existing research. It is proportional to pulse width. However, accurate probability is not proportional to pulse width. the latching probability is underestimated in the research. This paper presents modeling method of latching probability considering not only difference of pulse width but also difference of transition time. In this paper, we show the evaluation result of the model by using SER(Soft Error Rate) that is probability that soft error occurs and propagate wrong value to output at unit time. Our model estimated SER 0.03\% smaller while the existing model estimated SER 5.8\% smaller. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Dependability decrease factor of LSI / SER(Soft Error Rate) estimation / latching probability of pulse / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 110, no. 210, VLD2010-56, pp. 83-88, Sept. 2010. | |
| Paper # | VLD2010-56 | |
| Date of Issue | 2010-09-20 (VLD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2010-56 |
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| Conference Information | |
| Committee | VLD |
| Conference Date | 2010-09-27 - 2010-09-28 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kyoto Institute of Technology |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Physical design, etc |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2010-09-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Modeling of Latching Probability of Soft-Error-Induced Pulse |
| Sub Title (in English) | |
| Keyword(1) | Dependability decrease factor of LSI |
| Keyword(2) | SER(Soft Error Rate) estimation |
| Keyword(3) | latching probability of pulse |
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| 1st Author's Name | Motoharu Hirata |
| 1st Author's Affiliation | Kyusyu University (Kyusyu Univ.) |
| 2nd Author's Name | Masayoshi Yoshimura |
| 2nd Author's Affiliation | Kyusyu University (Kyusyu Univ.) |
| 3rd Author's Name | Yusuke Matsunaga |
| 3rd Author's Affiliation | Kyusyu University (Kyusyu Univ.) |
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| Speaker | Author-1 |
| Date Time | 2010-09-28 15:50:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2010-56 |
| Volume (vol) | vol.110 |
| Number (no) | no.210 |
| Page | pp.83-88 |
| #Pages | 6 |
| Date of Issue | 2010-09-20 (VLD) |
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