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Paper Abstract and Keywords
Presentation 2010-09-17 11:00
Removing context memory from Multi-context Dynamically Reconfigurable Processors
Hideharu Amano, Masayuki Kimura, Nobuaki Ozaki (Keio Univ.) RECONF2010-34
Abstract (in Japanese) (See Japanese page) 
(in English) Although context memory or configuration cache is a key mechanism for quick dyna
reconfiguration of multi-context Dynamically Reconfigurable Processing Array (DR
it requires a large amount of area and energy. In order to save them,
methods to remove the context memory from multi-context DRPA are proposed.
In order to keep a context without switching, Loop Separation for Keeping Datapa
th (LSKD)
is introduced. By separating loops by the compiler and some additional hardware,
the same context can be used without switching in a certain clock cycles.
The back-ground configuration data loading time can be reduced by multicasting
configuration data with two dimensional bit-map. For further reduction,
the differential loading and spare register are proposed.
With combination of them, the increasing execution time is only up to 12-13\% if
the target application does not have loop-carried dependency.
With the above overhead on the performance, the semiconductor area becomes 63\%,
the energy consumption is reduced to 40\%, thus, the performance per cost or ene
is much improved.
Keyword (in Japanese) (See Japanese page) 
(in English) Dynamically Reconfigurable Processor / Context Memory / Low Power Design / / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 204, RECONF2010-34, pp. 97-102, Sept. 2010.
Paper # RECONF2010-34 
Date of Issue 2010-09-09 (RECONF) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF RECONF2010-34

Conference Information
Committee RECONF  
Conference Date 2010-09-16 - 2010-09-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Shizuoka University (Faculty of Eng., Hall 2) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Reconfigurable Systems, etc. 
Paper Information
Registration To RECONF 
Conference Code 2010-09-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Removing context memory from Multi-context Dynamically Reconfigurable Processors 
Sub Title (in English)  
Keyword(1) Dynamically Reconfigurable Processor  
Keyword(2) Context Memory  
Keyword(3) Low Power Design  
1st Author's Name Hideharu Amano  
1st Author's Affiliation Keio University (Keio Univ.)
2nd Author's Name Masayuki Kimura  
2nd Author's Affiliation Keio University (Keio Univ.)
3rd Author's Name Nobuaki Ozaki  
3rd Author's Affiliation Keio University (Keio Univ.)
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Date Time 2010-09-17 11:00:00 
Presentation Time 25 
Registration for RECONF 
Paper # IEICE-RECONF2010-34 
Volume (vol) IEICE-110 
Number (no) no.204 
Page pp.97-102 
#Pages IEICE-6 
Date of Issue IEICE-RECONF-2010-09-09 

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