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Paper Abstract and Keywords
Presentation 2010-09-16 13:50
A Consideration of Reconfigurable Processor for RSA Cryptography
Takatoshi Tamaoki, Kazuya Tanigawa, Tetsuo Hironaka (hcu) RECONF2010-22
Abstract (in Japanese) (See Japanese page) 
(in English) Encrypting and decrypting RSA require many exponentiation calculations, and modulo calculation with
bit-with wider than 1024bit. To accelerate such calculations, many researchers have developed hardware accelerators.
These hardware accelerators deal with large bit width by using many operation units with smaller bit width.
However, the calculation method requires many additions to sum up carry outputs caused by summation, which
increase execution time of RSA cryptography. This paper shows a novel reconfigurable processor which has an
acceleration mechanism for such carry calculations. We evaluated the performance and usage of hardware resources.
Compared with the reconfigurable processor without the proposed carry acceleration, as the result the number of
computing units used was decreased to 1/318, and the execution time was decreased to 1/22.
Keyword (in Japanese) (See Japanese page) 
(in English) RSA cryptographic / reconfigurable processor / long bit-width operation / / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 204, RECONF2010-22, pp. 25-30, Sept. 2010.
Paper # RECONF2010-22 
Date of Issue 2010-09-09 (RECONF) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF RECONF2010-22

Conference Information
Committee RECONF  
Conference Date 2010-09-16 - 2010-09-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Shizuoka University (Faculty of Eng., Hall 2) 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Reconfigurable Systems, etc. 
Paper Information
Registration To RECONF 
Conference Code 2010-09-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Consideration of Reconfigurable Processor for RSA Cryptography 
Sub Title (in English)  
Keyword(1) RSA cryptographic  
Keyword(2) reconfigurable processor  
Keyword(3) long bit-width operation  
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1st Author's Name Takatoshi Tamaoki  
1st Author's Affiliation Hiroshima City University (hcu)
2nd Author's Name Kazuya Tanigawa  
2nd Author's Affiliation Hiroshima City University (hcu)
3rd Author's Name Tetsuo Hironaka  
3rd Author's Affiliation Hiroshima City University (hcu)
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Speaker
Date Time 2010-09-16 13:50:00 
Presentation Time 25 
Registration for RECONF 
Paper # IEICE-RECONF2010-22 
Volume (vol) IEICE-110 
Number (no) no.204 
Page pp.25-30 
#Pages IEICE-6 
Date of Issue IEICE-RECONF-2010-09-09 


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