Paper Abstract and Keywords |
Presentation |
2010-08-26 13:25
Design Constraint of Fine Grain Supply Voltage Control LSI
-- In the case of Power Gating Technique -- Atsuki Inoue (Fujitsu Lab. Ltd.) SDM2010-132 ICD2010-47 Link to ES Tech. Rep. Archives: SDM2010-132 ICD2010-47 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Supply voltage control technique for realizing low power LSI is utilized not only for general purpose processors but also for custom ASICs thanks to advanced LSI design environments. Recently fine grain supply voltage control in terms of space and/or time has been referred as promising technique to reduce power consumption. However, the transient fine grain control requires additional energy overhead for control itself, it must be some design constraint which has not been discussed clearly. In this presentation, we discuss consumed energy including this overhead using simple circuit model when we apply power gating technique and try to make clear what kind of design constraints we have and which are the major parameters for its constraint. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Supply voltage control / Fine grain control / Power gating / Low Power / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 110, no. 183, ICD2010-47, pp. 45-49, Aug. 2010. |
Paper # |
ICD2010-47 |
Date of Issue |
2010-08-19 (SDM, ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
SDM2010-132 ICD2010-47 Link to ES Tech. Rep. Archives: SDM2010-132 ICD2010-47 |
Conference Information |
Committee |
ICD SDM |
Conference Date |
2010-08-26 - 2010-08-27 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Sapporo Center for Gender Equality |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Low voltage/low power techniques, novel devices, circuits, and applications |
Paper Information |
Registration To |
ICD |
Conference Code |
2010-08-ICD-SDM |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Design Constraint of Fine Grain Supply Voltage Control LSI |
Sub Title (in English) |
In the case of Power Gating Technique |
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Supply voltage control |
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Fine grain control |
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Power gating |
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Low Power |
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1st Author's Name |
Atsuki Inoue |
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Fujitsu Laboratories Limited (Fujitsu Lab. Ltd.) |
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Speaker |
Author-1 |
Date Time |
2010-08-26 13:25:00 |
Presentation Time |
25 minutes |
Registration for |
ICD |
Paper # |
SDM2010-132, ICD2010-47 |
Volume (vol) |
vol.110 |
Number (no) |
no.182(SDM), no.183(ICD) |
Page |
pp.45-49 |
#Pages |
5 |
Date of Issue |
2010-08-19 (SDM, ICD) |
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