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| Paper Abstract and Keywords | ||
| Presentation | 2010-06-22 13:20 An Implementation of Sequentialization and State-Reduction for Analyzing Concurrent Systems -- Towards Automatic Generation of Specifications -- Yoshinao Isobe (AIST)  CAS2010-25 VLD2010-35 SIP2010-46 CST2010-25 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | It is difficult to understand the whole behavior of concurrent systems comparing with sequential systems. Therefore, model checkers or theorem provers are used for verifying whether a model of a concurrent system observationally equals a formal specification. However, describing such formal specifications is often more difficult than modeling systems. This paper presents methods to sequentialize concurrent behaviors and reduce the number of states based on a symbolic approach, for generating specifications, and shows an implementation of the methods. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | concurrent system / analysis tool / process algebra / model check / symbolic semantics / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 110, June 2010. | |
| Paper # | ||
| Date of Issue | 2010-06-14 (CAS, VLD, SIP, CST) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CAS2010-25 VLD2010-35 SIP2010-46 CST2010-25 |
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| Conference Information | |
| Committee | CAS MSS VLD SIP |
| Conference Date | 2010-06-21 - 2010-06-22 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kitami Institute of Technology |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | MSS |
| Conference Code | 2010-06-CAS-CST-VLD-SIP |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Implementation of Sequentialization and State-Reduction for Analyzing Concurrent Systems |
| Sub Title (in English) | Towards Automatic Generation of Specifications |
| Keyword(1) | concurrent system |
| Keyword(2) | analysis tool |
| Keyword(3) | process algebra |
| Keyword(4) | model check |
| Keyword(5) | symbolic semantics |
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| 1st Author's Name | Yoshinao Isobe |
| 1st Author's Affiliation | National Institute of Advanced Industrial Science and Technology (AIST) |
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| Speaker | Author-1 |
| Date Time | 2010-06-22 13:20:00 |
| Presentation Time | 25 minutes |
| Registration for | MSS |
| Paper # | CAS2010-25, VLD2010-35, SIP2010-46, CST2010-25 |
| Volume (vol) | vol.110 |
| Number (no) | no.86(CAS), no.87(VLD), no.88(SIP), no.89(CST) |
| Page | pp.139-144 |
| #Pages | 6 |
| Date of Issue | 2010-06-14 (CAS, VLD, SIP, CST) |
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