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Paper Abstract and Keywords
Presentation 2010-05-13 16:20
A Case Study of Evaluation Technique for Soft Error Tolerance on SRAMs-based FPGAs.
Tsuyoshi Kimura, Noritaka Kai, Yoshiaki Tsutsumi, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2010-7
Abstract (in Japanese) (See Japanese page) 
(in English) SRAM-based field programmable gate arrays (FPGAs) are vulnerable to a single event upset (SEU),which is induced by radiation effect.
Therefore, the importance of the dependable implementation technique is increasing, and the accurate dependability analysis method is required in order to demonstrate their dependability.
Most of present analysis technique is performed by using dynamic partial reconfiguration to emulate the soft-error.
However, it takes long time to analyze the dependability because it requires many times of reconfiguration to complete the soft-error injection.
In the present paper, we construct the soft-error estimation system to analyze the reliability and to reduce the estimation time.
As a result of our experimentation for 16 bits full-adder and multiplier, we can estimate the dependability of implemented system.
Moreover, the constructed system can reduce the estimation time.
Keyword (in Japanese) (See Japanese page) 
(in English) soft error / partial reconfiguration / SEU / self test / / / /  
Reference Info. IEICE Tech. Rep., vol. 110, no. 32, RECONF2010-7, pp. 37-42, May 2010.
Paper # RECONF2010-7 
Date of Issue 2010-05-06 (RECONF) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee RECONF  
Conference Date 2010-05-13 - 2010-05-14 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To RECONF 
Conference Code 2010-05-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A Case Study of Evaluation Technique for Soft Error Tolerance on SRAMs-based FPGAs. 
Sub Title (in English)  
Keyword(1) soft error  
Keyword(2) partial reconfiguration  
Keyword(3) SEU  
Keyword(4) self test  
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1st Author's Name Tsuyoshi Kimura  
1st Author's Affiliation Kumamoto University (Kumamoto Univ.)
2nd Author's Name Noritaka Kai  
2nd Author's Affiliation Kumamoto University (Kumamoto Univ.)
3rd Author's Name Yoshiaki Tsutsumi  
3rd Author's Affiliation Kumamoto University (Kumamoto Univ.)
4th Author's Name Motoki Amagasaki  
4th Author's Affiliation Kumamoto University (Kumamoto Univ.)
5th Author's Name Morihiro Kuga  
5th Author's Affiliation Kumamoto University (Kumamoto Univ.)
6th Author's Name Toshinori Sueyoshi  
6th Author's Affiliation Kumamoto University (Kumamoto Univ.)
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Speaker
Date Time 2010-05-13 16:20:00 
Presentation Time 25 
Registration for RECONF 
Paper # IEICE-RECONF2010-7 
Volume (vol) IEICE-110 
Number (no) no.32 
Page pp.37-42 
#Pages IEICE-6 
Date of Issue IEICE-RECONF-2010-05-06 


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