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Paper Abstract and Keywords
Presentation 2010-03-27 14:50
Quantitative Evaluation of Task-Switching Overhead in Cache Memory
Mitsunori Serizawa, Makoto Sugihara (TUT) CPSY2009-85 DC2009-82
Abstract (in Japanese) (See Japanese page) 
(in English) In the state-of-the-art computer systems trend, it is indispensable to have cache memory for high-speed processing,
and multitask processing which executes multiple tasks by switching.
With multitasking, it is necessary for data of a preceding task in a cache memory to evacuate to a main memory at the time of task switching.
In this research, based on the idea that the performance of processors will be improved by decreasing performance overhead, dirty lines in cache memories, which are the cause of performance overhead, are to be focused.
The quantitative evaluation of performance overhead caused by the dirty lines expelled by task switching was conducted.
As a result, it was found out that the performance overhead was influenced by the programs, the time slices and the execution cycles increased 37 percent compared to the cases where task switching did not occur.
Keyword (in Japanese) (See Japanese page) 
(in English) cache memory / task switching / dirty line / performance overhead / / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 474, CPSY2009-85, pp. 303-308, March 2010.
Paper # CPSY2009-85 
Date of Issue 2010-03-19 (CPSY, DC) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Conference Date 2010-03-26 - 2010-03-28 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To CPSY 
Conference Code 2010-03-CPSY-DC-SLDM-EMB-UBI-MBL 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Quantitative Evaluation of Task-Switching Overhead in Cache Memory 
Sub Title (in English)  
Keyword(1) cache memory  
Keyword(2) task switching  
Keyword(3) dirty line  
Keyword(4) performance overhead  
1st Author's Name Mitsunori Serizawa  
1st Author's Affiliation Toyohashi University of Technology (TUT)
2nd Author's Name Makoto Sugihara  
2nd Author's Affiliation Toyohashi University of Technology (TUT)
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Date Time 2010-03-27 14:50:00 
Presentation Time 20 
Registration for CPSY 
Paper # IEICE-CPSY2009-85,IEICE-DC2009-82 
Volume (vol) IEICE-109 
Number (no) no.474(CPSY), no.475(DC) 
Page pp.303-308 
#Pages IEICE-6 
Date of Issue IEICE-CPSY-2010-03-19,IEICE-DC-2010-03-19 

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