Paper Abstract and Keywords |
Presentation |
2010-03-12 14:35
Design and Implementation of an AMBA AHB Compliant Bus Architecture on FPGA Xuan-Tu Tran, Hai-Phong Phan, Van-Huan Tran, Quang-Vinh Tran, Ngoc-Binh Nguyen (Vietnam National Univ.) VLD2009-127 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
To meet the increasing demands of recent applications, systems-on-chips (SoCs) are more and more complex and one system can be composed of many computing resources. The communication solution between these resources becomes one of big challenges in the design of SoCs. In this paper, we present the design and implementation of an AMBA Advanced High-performance Bus based bus architecture for a SoC platform on a Xilinx Virtex-4 XC4VLX40 FPGA. This architecture includes bus master and bus slave wrappers in order to ease the integration of intellectual property cores in systems. Simulation and implementation results are also reported and analyzed to prove the performance of the designed architecture. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
On-chip communication / ABMA AHB / SoC / high-performance bus / bus protocol / wrapper / / |
Reference Info. |
IEICE Tech. Rep., vol. 109, no. 462, VLD2009-127, pp. 169-174, March 2010. |
Paper # |
VLD2009-127 |
Date of Issue |
2010-03-03 (VLD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2009-127 |
Conference Information |
Committee |
VLD |
Conference Date |
2010-03-10 - 2010-03-12 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
|
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Technology for System-on-Silicon |
Paper Information |
Registration To |
VLD |
Conference Code |
2010-03-VLD |
Language |
English |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Design and Implementation of an AMBA AHB Compliant Bus Architecture on FPGA |
Sub Title (in English) |
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Keyword(1) |
On-chip communication |
Keyword(2) |
ABMA AHB |
Keyword(3) |
SoC |
Keyword(4) |
high-performance bus |
Keyword(5) |
bus protocol |
Keyword(6) |
wrapper |
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1st Author's Name |
Xuan-Tu Tran |
1st Author's Affiliation |
Vietnam National University (Vietnam National Univ.) |
2nd Author's Name |
Hai-Phong Phan |
2nd Author's Affiliation |
Vietnam National University (Vietnam National Univ.) |
3rd Author's Name |
Van-Huan Tran |
3rd Author's Affiliation |
Vietnam National University (Vietnam National Univ.) |
4th Author's Name |
Quang-Vinh Tran |
4th Author's Affiliation |
Vietnam National University (Vietnam National Univ.) |
5th Author's Name |
Ngoc-Binh Nguyen |
5th Author's Affiliation |
Vietnam National University (Vietnam National Univ.) |
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Speaker |
Author-1 |
Date Time |
2010-03-12 14:35:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2009-127 |
Volume (vol) |
vol.109 |
Number (no) |
no.462 |
Page |
pp.169-174 |
#Pages |
6 |
Date of Issue |
2010-03-03 (VLD) |