Paper Abstract and Keywords |
Presentation |
2010-03-10 13:30
An Automatic Layout System for Timing Pulse Generator of Small LCD Driver Circuits Shohei Asakawa, Yuichi Sakakibara, Shuji Tsukiyama (Chuo Univ.), Isao Shirakawa (Univ. of Hyogo), Shuji Nishi, Tadashi Takeda, Tomoyuki Nagai, Yasushi Kubota (Sharp Corp.) VLD2009-99 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
The driver circuit for a small LCD is implemented on the same glass substrate as LCD, which is called System on Glass. The timing pulse generator of the driver circuit, which generates trigger signals for drivers of each pixel, is usually laid out in a restricted remaining area after the layout of other driver subcircuits. Therefore, if such a timing pulse generator is laid out automatically, then the layout design becomes efficient and the design cost is reduced. This paper describes an automatic layout system for the timing pulse generator. The system is constructed by using existing automatic placement and routing tools which can be applied to System on Glass technology, and can generate an equivalent layout to a handmade design around 2 hours. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
automatic layout system / timing pulse generator / small LCD driver circuit / System on Glass technology / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 109, no. 462, VLD2009-99, pp. 1-6, March 2010. |
Paper # |
VLD2009-99 |
Date of Issue |
2010-03-03 (VLD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2009-99 |
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