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Paper Abstract and Keywords
Presentation 2010-03-10 13:30
An Automatic Layout System for Timing Pulse Generator of Small LCD Driver Circuits
Shohei Asakawa, Yuichi Sakakibara, Shuji Tsukiyama (Chuo Univ.), Isao Shirakawa (Univ. of Hyogo), Shuji Nishi, Tadashi Takeda, Tomoyuki Nagai, Yasushi Kubota (Sharp Corp.) VLD2009-99
Abstract (in Japanese) (See Japanese page) 
(in English) The driver circuit for a small LCD is implemented on the same glass substrate as LCD, which is called System on Glass. The timing pulse generator of the driver circuit, which generates trigger signals for drivers of each pixel, is usually laid out in a restricted remaining area after the layout of other driver subcircuits. Therefore, if such a timing pulse generator is laid out automatically, then the layout design becomes efficient and the design cost is reduced. This paper describes an automatic layout system for the timing pulse generator. The system is constructed by using existing automatic placement and routing tools which can be applied to System on Glass technology, and can generate an equivalent layout to a handmade design around 2 hours.
Keyword (in Japanese) (See Japanese page) 
(in English) automatic layout system / timing pulse generator / small LCD driver circuit / System on Glass technology / / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 462, VLD2009-99, pp. 1-6, March 2010.
Paper # VLD2009-99 
Date of Issue 2010-03-03 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee VLD  
Conference Date 2010-03-10 - 2010-03-12 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for System-on-Silicon 
Paper Information
Registration To VLD 
Conference Code 2010-03-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) An Automatic Layout System for Timing Pulse Generator of Small LCD Driver Circuits 
Sub Title (in English)  
Keyword(1) automatic layout system  
Keyword(2) timing pulse generator  
Keyword(3) small LCD driver circuit  
Keyword(4) System on Glass technology  
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1st Author's Name Shohei Asakawa  
1st Author's Affiliation Chuo University (Chuo Univ.)
2nd Author's Name Yuichi Sakakibara  
2nd Author's Affiliation Chuo University (Chuo Univ.)
3rd Author's Name Shuji Tsukiyama  
3rd Author's Affiliation Chuo University (Chuo Univ.)
4th Author's Name Isao Shirakawa  
4th Author's Affiliation University of Hyogo (Univ. of Hyogo)
5th Author's Name Shuji Nishi  
5th Author's Affiliation Sharp Corporation (Sharp Corp.)
6th Author's Name Tadashi Takeda  
6th Author's Affiliation Sharp Corporation (Sharp Corp.)
7th Author's Name Tomoyuki Nagai  
7th Author's Affiliation Sharp Corporation (Sharp Corp.)
8th Author's Name Yasushi Kubota  
8th Author's Affiliation Sharp Corporation (Sharp Corp.)
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Speaker Author-1 
Date Time 2010-03-10 13:30:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2009-99 
Volume (vol) vol.109 
Number (no) no.462 
Page pp.1-6 
#Pages
Date of Issue 2010-03-03 (VLD) 


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