Paper Abstract and Keywords |
Presentation |
2010-03-04 16:20
A Study on Face Recognition Using LAB for Embedded Hardware Implementation Yutaka Usui (Raytron, Inc/Tottori Univ.), Katsuya Kondo (Tottori Univ.) SIS2009-57 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Many fast and accurate face detection system have been proposed. However, it is not easy to implement a face recognition system to low computational cost system such as camera network and moving robots. In this report, a face recognition method for embedded hardware is presented. A combination of LAB(Locally Assembled Binary Patterns) and Discrete Adaboost method achieves 15% reduction of computational cost without sacrificing recognition accuracy. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
LAB / LBP / Haarlike feature / FPGA / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 109, no. 447, SIS2009-57, pp. 49-52, March 2010. |
Paper # |
SIS2009-57 |
Date of Issue |
2010-02-25 (SIS) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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SIS2009-57 |
Conference Information |
Committee |
SIS |
Conference Date |
2010-03-04 - 2010-03-05 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kanagawa Institute of Technology |
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(See Japanese page) |
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Paper Information |
Registration To |
SIS |
Conference Code |
2010-03-SIS |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
A Study on Face Recognition Using LAB for Embedded Hardware Implementation |
Sub Title (in English) |
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LAB |
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LBP |
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Haarlike feature |
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FPGA |
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1st Author's Name |
Yutaka Usui |
1st Author's Affiliation |
Raytron, Inc/Tottori University (Raytron, Inc/Tottori Univ.) |
2nd Author's Name |
Katsuya Kondo |
2nd Author's Affiliation |
Tottori University (Tottori Univ.) |
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Speaker |
Author-1 |
Date Time |
2010-03-04 16:20:00 |
Presentation Time |
20 minutes |
Registration for |
SIS |
Paper # |
SIS2009-57 |
Volume (vol) |
vol.109 |
Number (no) |
no.447 |
Page |
pp.49-52 |
#Pages |
4 |
Date of Issue |
2010-02-25 (SIS) |
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