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| Presentation | 2010-02-05 14:00 Low resistive and highly reliable copper interconnects in combination of silicide-cap with Ti-barrier for 32 nm-node and beyond Yumi Hayashi, Noriaki Matsunaga, Makoto Wada, Shinichi Nakao, Atsuko Sakata, Kei Watanabe, Hideki Shibata (Toshiba)  SDM2009-187 Link to ES Tech. Rep. Archives: SDM2009-187 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Silicide-cap for Cu interconnects is promising for enhancing electromigration (EM) performance for 32 nm-node and beyond. But the trade-off properties of silicide-cap between EM lifetime and line resistance remain to be resolved. Increasing of line resistance is caused by Si diffusion in Cu line. So, we focused on Ti barrier metal (BM), which diffuses in Cu line, and applied it in combination with silicide-cap, in order to keep Si stable at the surface of Cu line. As a result, we achieved EM median time-to-failure (MTF) 100 times longer than that of the sample w/o silicide-cap and Ta-BM while line resistance is kept lower. Activation energy (Ea) of EM of 1.45 eV is achieved. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Silicide-cap / Ti barrier metal / Cu interconnects / Electromigration / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 412, SDM2009-187, pp. 31-36, Feb. 2010. | |
| Paper # | SDM2009-187 | |
| Date of Issue | 2010-01-29 (SDM) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | SDM2009-187 Link to ES Tech. Rep. Archives: SDM2009-187 |
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| Conference Information | |
| Committee | SDM |
| Conference Date | 2010-02-05 - 2010-02-05 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kikai-Shinko-Kaikan Bldg. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Paper Information | |
| Registration To | SDM |
| Conference Code | 2010-02-SDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Low resistive and highly reliable copper interconnects in combination of silicide-cap with Ti-barrier for 32 nm-node and beyond |
| Sub Title (in English) | |
| Keyword(1) | Silicide-cap |
| Keyword(2) | Ti barrier metal |
| Keyword(3) | Cu interconnects |
| Keyword(4) | Electromigration |
| Keyword(5) | |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Yumi Hayashi |
| 1st Author's Affiliation | Toshiba Corporation (Toshiba) |
| 2nd Author's Name | Noriaki Matsunaga |
| 2nd Author's Affiliation | Toshiba Corporation (Toshiba) |
| 3rd Author's Name | Makoto Wada |
| 3rd Author's Affiliation | Toshiba Corporation (Toshiba) |
| 4th Author's Name | Shinichi Nakao |
| 4th Author's Affiliation | Toshiba Corporation (Toshiba) |
| 5th Author's Name | Atsuko Sakata |
| 5th Author's Affiliation | Toshiba Corporation (Toshiba) |
| 6th Author's Name | Kei Watanabe |
| 6th Author's Affiliation | Toshiba Corporation (Toshiba) |
| 7th Author's Name | Hideki Shibata |
| 7th Author's Affiliation | Toshiba Corporation (Toshiba) |
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| Speaker | Author-1 |
| Date Time | 2010-02-05 14:00:00 |
| Presentation Time | 30 minutes |
| Registration for | SDM |
| Paper # | SDM2009-187 |
| Volume (vol) | vol.109 |
| Number (no) | no.412 |
| Page | pp.31-36 |
| #Pages | 6 |
| Date of Issue | 2010-01-29 (SDM) |
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