Paper Abstract and Keywords |
Presentation |
2010-01-27 12:40
An efficient hardware-oriented algorithm for regular expression matching based on parallel bit-distribution Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga (Hokkaido Univ.) VLD2009-90 CPSY2009-72 RECONF2009-75 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
In this paper, we study the regular expression matching problem for fast data stream processing. We present an efficient algorithm for based on new bit-parallel methods, called parallel scatter and gather exploiting bit-parallelism in a computer word. Finally, we show an architecture for a hardware implementation of our algorithm. The architecture can change its regular expression patterns on-the-fly without expensive reconfiguration. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
Bit-Parallel algorithm / Regular expression / Pattern matching / Hardware algorithm / / / / |
Reference Info. |
IEICE Tech. Rep., vol. 109, no. 395, RECONF2009-75, pp. 131-136, Jan. 2010. |
Paper # |
RECONF2009-75 |
Date of Issue |
2010-01-19 (VLD, CPSY, RECONF) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2009-90 CPSY2009-72 RECONF2009-75 |
Conference Information |
Committee |
IPSJ-SLDM VLD CPSY RECONF |
Conference Date |
2010-01-26 - 2010-01-27 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Keio Univ (Hiyoshi Campus) |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
FPGA Applications, etc |
Paper Information |
Registration To |
RECONF |
Conference Code |
2010-01-SLDM-VLD-CPSY-RECONF |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
An efficient hardware-oriented algorithm for regular expression matching based on parallel bit-distribution |
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Keyword(1) |
Bit-Parallel algorithm |
Keyword(2) |
Regular expression |
Keyword(3) |
Pattern matching |
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Hardware algorithm |
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1st Author's Name |
Yusaku Kaneta |
1st Author's Affiliation |
Hokkaido University (Hokkaido Univ.) |
2nd Author's Name |
Shingo Yoshizawa |
2nd Author's Affiliation |
Hokkaido University (Hokkaido Univ.) |
3rd Author's Name |
Shin-ichi Minato |
3rd Author's Affiliation |
Hokkaido University (Hokkaido Univ.) |
4th Author's Name |
Hiroki Arimura |
4th Author's Affiliation |
Hokkaido University (Hokkaido Univ.) |
5th Author's Name |
Yoshikazu Miyanaga |
5th Author's Affiliation |
Hokkaido University (Hokkaido Univ.) |
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Speaker |
Author-1 |
Date Time |
2010-01-27 12:40:00 |
Presentation Time |
25 minutes |
Registration for |
RECONF |
Paper # |
VLD2009-90, CPSY2009-72, RECONF2009-75 |
Volume (vol) |
vol.109 |
Number (no) |
no.393(VLD), no.394(CPSY), no.395(RECONF) |
Page |
pp.131-136 |
#Pages |
6 |
Date of Issue |
2010-01-19 (VLD, CPSY, RECONF) |
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