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Paper Abstract and Keywords
Presentation 2010-01-25 16:10
Size-Energy Tradeoff of Unate Circuits Computing Symmetric Functions
Kei Uchizawa (Tohoku Univ.), Eiji Takimoto (Kyushu Univ.), Takao Nishizeki (Tohoku Univ.) COMP2009-47
Abstract (in Japanese) (See Japanese page) 
(in English) A unate gate is a logical gate computing a unate Boolean function.
Examples of unate gates are
AND-gates, OR-gates, NOT-gates, threshold gates, \emph{etc}.
A unate circuit $C$ is a combinatorial logic circuit
consisting of unate gates.
Let $f$ be a symmetric
Boolean function of $n$ variables, whose value depends only on the number of ones
in the input.
Let $m_0$ and $m_1$ be the maximum number of consecutive 0's and consecutive 1's in the
value vector of $f$, respectively, and let $l=\min \{ m_0, m_1\}$ and $m=\max\{ m_0, m_1\}$.
Let $C$ be a unate circuit computing $f$.
Let $s$ be the size of the circuit $C$,
that is, $C$ consists of $s$ gates.
Let $e$ be the energy of $C$,
that is, at most $e$ gates in $C$ output ``1'' for any input.
In the paper, we show that there is a tradeoff between the size $s$ and energy $e$ of $C$.
More precisely, we show that $(n+1-l)/m \le s^e$.
We also present lower bounds on the size $s$ of $C$ represented in terms of $n$, $l$ and $m$.
Our tradeoff immediately implies that
$\log n\le e \log s$
for every unate circuit $C$ computing the Parity function of $n$
variables.
Keyword (in Japanese) (See Japanese page) 
(in English) Unate circuit / Energy complexity / Size / Circuit complexity / Symmetric function / Boolean function / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 391, COMP2009-47, pp. 57-64, Jan. 2010.
Paper # COMP2009-47 
Date of Issue 2010-01-18 (COMP) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF COMP2009-47

Conference Information
Committee COMP  
Conference Date 2010-01-25 - 2010-01-25 
Place (in Japanese) (See Japanese page) 
Place (in English) Nishijin Plaza, Kyushu University 
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To COMP 
Conference Code 2010-01-COMP 
Language English (Japanese title is available) 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Size-Energy Tradeoff of Unate Circuits Computing Symmetric Functions 
Sub Title (in English)  
Keyword(1) Unate circuit  
Keyword(2) Energy complexity  
Keyword(3) Size  
Keyword(4) Circuit complexity  
Keyword(5) Symmetric function  
Keyword(6) Boolean function  
Keyword(7)  
Keyword(8)  
1st Author's Name Kei Uchizawa  
1st Author's Affiliation Tohoku University (Tohoku Univ.)
2nd Author's Name Eiji Takimoto  
2nd Author's Affiliation Kyushu University (Kyushu Univ.)
3rd Author's Name Takao Nishizeki  
3rd Author's Affiliation Tohoku University (Tohoku Univ.)
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Speaker Author-1 
Date Time 2010-01-25 16:10:00 
Presentation Time 35 minutes 
Registration for COMP 
Paper # COMP2009-47 
Volume (vol) vol.109 
Number (no) no.391 
Page pp.57-64 
#Pages
Date of Issue 2010-01-18 (COMP) 


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