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Paper Abstract and Keywords
Presentation 2009-12-21 16:40
DC Operating Point Analysis of MOS Transistor Circuits Using the Variable Gain Newton Homotopy Method
Yasuhiro Koyama, Mitsuru Tonokura, Kiyotaka Yamamura (Chuo Univ.) NLP2009-137
Abstract (in Japanese) (See Japanese page) 
(in English) In the field of circuit simulation, homotopy methods have been studied by many researchers to overcome the convergence problem in DC operating point analysis. There are several types of homotopy methods. Among them, the variable-gain Newton homotopy method is known to be the most efficient method for bipolar transistor circuits, and the nonlinear homotopy method is known to be the most efficient method for MOS transistor circuits. In this paper, we propose a new variable-gain Newton homotopy method for solving MOS transistor circuits. It is shown that the proposed method is globally convergent from a practical viewpoint. By SPICE simulation, it is also shown that the proposed method is more efficient than the ATANSH homotopy method, the Newton homotopy method, and the nonlinear homotopy method.
Keyword (in Japanese) (See Japanese page) 
(in English) circuit simulation / DC operating point analysis / nonlinear circuit / homotopy method / / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 354, NLP2009-137, pp. 59-64, Dec. 2009.
Paper # NLP2009-137 
Date of Issue 2009-12-14 (NLP) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee NLP  
Conference Date 2009-12-21 - 2009-12-21 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
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Paper Information
Registration To NLP 
Conference Code 2009-12-NLP 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) DC Operating Point Analysis of MOS Transistor Circuits Using the Variable Gain Newton Homotopy Method 
Sub Title (in English)  
Keyword(1) circuit simulation  
Keyword(2) DC operating point analysis  
Keyword(3) nonlinear circuit  
Keyword(4) homotopy method  
1st Author's Name Yasuhiro Koyama  
1st Author's Affiliation Chuo University (Chuo Univ.)
2nd Author's Name Mitsuru Tonokura  
2nd Author's Affiliation Chuo University (Chuo Univ.)
3rd Author's Name Kiyotaka Yamamura  
3rd Author's Affiliation Chuo University (Chuo Univ.)
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Date Time 2009-12-21 16:40:00 
Presentation Time 25 
Registration for NLP 
Paper # IEICE-NLP2009-137 
Volume (vol) IEICE-109 
Number (no) no.354 
Page pp.59-64 
#Pages IEICE-6 
Date of Issue IEICE-NLP-2009-12-14 

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