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Paper Abstract and Keywords
Presentation 2009-12-03 14:45
Protocol for Expansion of Hardware in a Scalable FPGA System
Hironori Nakajo, Ryuichi Sakamoto, Shinobu Miwa (TUAT)
Abstract (in Japanese) (See Japanese page) 
(in English) In this presentation, we have proposed a mechanism to expand hardware in the Scalable FPGA system which has been currently developed. We have discussed its feasibility to expand a hardware circuit with the mechanism as well as future evolutions.
In detail, please consult the paper,
"Expansion of Hardware in a Scalable FPGA System"
in a technical report of Technical Committee on Reconfigurable Systems (RECONF) held during Jan 26th and 27th 2010 at Keio University Hiyoshi campus.
Keyword (in Japanese) (See Japanese page) 
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Conference Information
Committee VLD DC IPSJ-SLDM CPSY RECONF ICD CPM  
Conference Date 2009-12-02 - 2009-12-04 
Place (in Japanese) (See Japanese page) 
Place (in English) Kochi City Culture-Plaza 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Gaia 2009 ―New Field of VLSI Design― 
Paper Information
Registration To RECONF 
Conference Code 2009-12-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Protocol for Expansion of Hardware in a Scalable FPGA System 
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1st Author's Name Hironori Nakajo  
1st Author's Affiliation Tokyo University of Agriculture and Tecnology (TUAT)
2nd Author's Name Ryuichi Sakamoto  
2nd Author's Affiliation Tokyo University of Agriculture and Tecnology (TUAT)
3rd Author's Name Shinobu Miwa  
3rd Author's Affiliation Tokyo University of Agriculture and Tecnology (TUAT)
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Date Time 2009-12-03 14:45:00 
Presentation Time 20 minutes 
Registration for RECONF 
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Volume (vol) vol.109 
Number (no) no.320 
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