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| Presentation | 2009-09-25 10:00 An Approach for Algorithm Tuning of Power Grid Simulation by GPGPU Makoto Yokota, Yuuya Isoda, Hisako Sugano, Ittetsu Taniguchi, Masahiro Fukui (Ritsumeikan Univ.)  VLD2009-36 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper proposes a speeding up technique for massively parallel power gird simulator by GPGPU (General Purpose computing on Graphics Processing Unit). The proposed power grid simulator is implemented by considering the GPU architecture. Experimental results show that the proposed power grid simulator has achieved 71 times speeding-up than CPU computation with same accuracy. It is observed that the proposed method speeds up the computation 2.9 times. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | GPGPU / CUDA / power grid simulator / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 201, VLD2009-36, pp. 39-44, Sept. 2009. | |
| Paper # | VLD2009-36 | |
| Date of Issue | 2009-09-17 (VLD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2009-36 |
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| Conference Information | |
| Committee | VLD |
| Conference Date | 2009-09-24 - 2009-09-25 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Osaka University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Physical design, etc |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2009-09-VLD |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Approach for Algorithm Tuning of Power Grid Simulation by GPGPU |
| Sub Title (in English) | |
| Keyword(1) | GPGPU |
| Keyword(2) | CUDA |
| Keyword(3) | power grid simulator |
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| 1st Author's Name | Makoto Yokota |
| 1st Author's Affiliation | Ritsumeikan University (Ritsumeikan Univ.) |
| 2nd Author's Name | Yuuya Isoda |
| 2nd Author's Affiliation | Ritsumeikan University (Ritsumeikan Univ.) |
| 3rd Author's Name | Hisako Sugano |
| 3rd Author's Affiliation | Ritsumeikan University (Ritsumeikan Univ.) |
| 4th Author's Name | Ittetsu Taniguchi |
| 4th Author's Affiliation | Ritsumeikan University (Ritsumeikan Univ.) |
| 5th Author's Name | Masahiro Fukui |
| 5th Author's Affiliation | Ritsumeikan University (Ritsumeikan Univ.) |
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| Speaker | Author-1 |
| Date Time | 2009-09-25 10:00:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2009-36 |
| Volume (vol) | vol.109 |
| Number (no) | no.201 |
| Page | pp.39-44 |
| #Pages | 6 |
| Date of Issue | 2009-09-17 (VLD) |
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