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| Paper Abstract and Keywords | ||
| Presentation | 2009-09-24 15:00 Complete ILP-Formulation of High-Level Synthesis Keisuke Inoue, Mineo Kaneko (JAIST)  VLD2009-32 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | In VLSI design, automatic transformation from an algorithm level behavioral description to a RTL (Register Transfer Level) structural and behavioral description is called high-level synthesis. High-level synthesis is becoming an important design stage to optimize a final result in recent large scale VLSI design. This paper proposes an ILP formulation to solve the total high-level synthesis problem. Furthermore, it can be expected to develop an efficient heuristic algorithm based on our ILP formulation. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | high-level synthesis / integer linear programming / / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 201, VLD2009-32, pp. 19-24, Sept. 2009. | |
| Paper # | VLD2009-32 | |
| Date of Issue | 2009-09-17 (VLD) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2009-32 |
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| Conference Information | |
| Committee | VLD |
| Conference Date | 2009-09-24 - 2009-09-25 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Osaka University |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Physical design, etc |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2009-09-VLD |
| Language | English (Japanese title is available) |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Complete ILP-Formulation of High-Level Synthesis |
| Sub Title (in English) | |
| Keyword(1) | high-level synthesis |
| Keyword(2) | integer linear programming |
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| 1st Author's Name | Keisuke Inoue |
| 1st Author's Affiliation | Japan Advanced Institute of Science and Technology (JAIST) |
| 2nd Author's Name | Mineo Kaneko |
| 2nd Author's Affiliation | Japan Advanced Institute of Science and Technology (JAIST) |
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| Speaker | Author-1 |
| Date Time | 2009-09-24 15:00:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2009-32 |
| Volume (vol) | vol.109 |
| Number (no) | no.201 |
| Page | pp.19-24 |
| #Pages | 6 |
| Date of Issue | 2009-09-17 (VLD) |
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