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| Presentation | 2009-09-17 14:50 Low-power oriented clustering and placement tools using routability for FPGAs Shinya Imaizumi, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.)  RECONF2009-23 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Power consumption of Field Programmable Gate Arrays (FPGAs) is larger than Application Specific Integrated Circuits (ASICs) in a same circuit generally. Since routing resources consume many power in FPGA, reducing routing resources is crucial to reduce total power consumption. In this paper, we propose a clustering and placement tool using the routability of circuit to resolve this problem in Electric Design Automation (EDA) technologies. We focus on the number of connections between clusters. If the number of connections between clusters is reduced, clusters are placed close together and the amount of routing resource required to route a circuit is reduced consequently, so the routability improve. Our clustering tool reduces the number of connections between clusters and our placement tool places the clusters close together. As a result the average power consumption is decreased by 13\% compare with the traditional method. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | clustering / placement / low-power / routability / cluster-based FPGA / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 198, RECONF2009-23, pp. 25-30, Sept. 2009. | |
| Paper # | RECONF2009-23 | |
| Date of Issue | 2009-09-10 (RECONF) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | RECONF2009-23 |
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| Conference Information | |
| Committee | RECONF |
| Conference Date | 2009-09-17 - 2009-09-18 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Utsunomiya Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Reconfigurable Sysytems, etc. |
| Paper Information | |
| Registration To | RECONF |
| Conference Code | 2009-09-RECONF |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Low-power oriented clustering and placement tools using routability for FPGAs |
| Sub Title (in English) | |
| Keyword(1) | clustering |
| Keyword(2) | placement |
| Keyword(3) | low-power |
| Keyword(4) | routability |
| Keyword(5) | cluster-based FPGA |
| Keyword(6) | |
| Keyword(7) | |
| Keyword(8) | |
| 1st Author's Name | Shinya Imaizumi |
| 1st Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 2nd Author's Name | Masahiro Iida |
| 2nd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
| 3rd Author's Name | Toshinori Sueyoshi |
| 3rd Author's Affiliation | Kumamoto University (Kumamoto Univ.) |
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| Speaker | Author-1 |
| Date Time | 2009-09-17 14:50:00 |
| Presentation Time | 25 minutes |
| Registration for | RECONF |
| Paper # | RECONF2009-23 |
| Volume (vol) | vol.109 |
| Number (no) | no.198 |
| Page | pp.25-30 |
| #Pages | 6 |
| Date of Issue | 2009-09-10 (RECONF) |
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