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| Presentation | 2009-08-11 13:55 FPGA implementation of a Wave-Pipelined Firewall Unit Keisuke Saito, Kei Ito, Shuya Imaruoka, Tomoaki Sato, Masa-aki Fukase (Hirosaki Univ.)  CPM2009-48 Link to ES Tech. Rep. Archives: CPM2009-48 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | We have been working on the development of H-HIPS by using a FPGA. A FPGA can change circuits information easily. But, it is inferior in processing speed and power consumption to a LSI by customizing. In an embedded system by using a FPGA, development of method for low-power operations on a FPGA is important. Therefore, we selected Wave-pipeline technique, and adopted it for a Firewall Unit of H-HIPS. Because Wave-pipeline is a pipeline technique which don't use pipeline registers, wave-pipelined circuits can achieve low-power and high-speed operations in comparison with conventional pipelined circuits. In this paper, we describe about implementation of a Wave-pipelined Firewall Unit to a FPGA. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | FPGA / Unauthorized Computer Access / Wave-Pipeline / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 171, CPM2009-48, pp. 77-81, Aug. 2009. | |
| Paper # | CPM2009-48 | |
| Date of Issue | 2009-08-03 (CPM) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPM2009-48 Link to ES Tech. Rep. Archives: CPM2009-48 |
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| Conference Information | |
| Committee | CPM |
| Conference Date | 2009-08-10 - 2009-08-11 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Hirosaki Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Electronic Component Parts and Materials, etc. |
| Paper Information | |
| Registration To | CPM |
| Conference Code | 2009-08-CPM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | FPGA implementation of a Wave-Pipelined Firewall Unit |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | Unauthorized Computer Access |
| Keyword(3) | Wave-Pipeline |
| Keyword(4) | |
| Keyword(5) | |
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| 1st Author's Name | Keisuke Saito |
| 1st Author's Affiliation | Hirosaki University (Hirosaki Univ.) |
| 2nd Author's Name | Kei Ito |
| 2nd Author's Affiliation | Hirosaki University (Hirosaki Univ.) |
| 3rd Author's Name | Shuya Imaruoka |
| 3rd Author's Affiliation | Hirosaki University (Hirosaki Univ.) |
| 4th Author's Name | Tomoaki Sato |
| 4th Author's Affiliation | Hirosaki University (Hirosaki Univ.) |
| 5th Author's Name | Masa-aki Fukase |
| 5th Author's Affiliation | Hirosaki University (Hirosaki Univ.) |
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| Speaker | Author-1 |
| Date Time | 2009-08-11 13:55:00 |
| Presentation Time | 25 minutes |
| Registration for | CPM |
| Paper # | CPM2009-48 |
| Volume (vol) | vol.109 |
| Number (no) | no.171 |
| Page | pp.77-81 |
| #Pages | 5 |
| Date of Issue | 2009-08-03 (CPM) |
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