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Paper Abstract and Keywords
Presentation 2009-07-16 15:50
The Study of Mobility-Tinv Trade-off in Deeply Scaled High-k/Metal Gate Devices and Scaling Design Guideline for 22nm-node Generation
Masakazu Goto, Shigeru Kawanaka, Seiji Inumiya, Naoki Kusunoki, Masumi Saitoh, Kosuke Tatsumura, Atsuhiro Kinoshita, Satoshi Inaba, Yoshiaki Toyoshima (Toshiba) SDM2009-107 ICD2009-23 Link to ES Tech. Rep. Archives: SDM2009-107 ICD2009-23
Abstract (in Japanese) (See Japanese page) 
(in English) The trade-off between Tinv scaling and carrier mobility () degradation in deeply scaled HK/MG nMOSFETs has been investigated based on experimental results. Ion components are analyzed in terms of Ns, inj and SCE in Lg=25nm devices for the first time. As a result, it is clarified that the aggressive Tinv scaling can achieve the performance improvement even if  degradation occurs in some degree, because  impact decreases with Lg and Tinv scaling impact becomes strong. Furthermore, we have introduced the effective Tinv scaling (novel SiON) process and demonstrated its excellent device performance (Ion=1mA/m @Ioff=100nA/m, Lg=25nm, Vdd=1.0V, Avt=1.8mVm, Tinv=1.13nm, without any performance booster technology).
Keyword (in Japanese) (See Japanese page) 
(in English) MOSFET scaling / Tinv / Carrier mobility / DIBL / high-k dielectric / Metal gate electrode / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 133, SDM2009-107, pp. 53-56, July 2009.
Paper # SDM2009-107 
Date of Issue 2009-07-09 (SDM, ICD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
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Download PDF SDM2009-107 ICD2009-23 Link to ES Tech. Rep. Archives: SDM2009-107 ICD2009-23

Conference Information
Committee ICD SDM  
Conference Date 2009-07-16 - 2009-07-17 
Place (in Japanese) (See Japanese page) 
Place (in English) Tokyo Institute of Technology 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Low voltage/low power techniques, novel devices, circuits, and applications 
Paper Information
Registration To SDM 
Conference Code 2009-07-ICD-SDM 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) The Study of Mobility-Tinv Trade-off in Deeply Scaled High-k/Metal Gate Devices and Scaling Design Guideline for 22nm-node Generation 
Sub Title (in English)  
Keyword(1) MOSFET scaling  
Keyword(2) Tinv  
Keyword(3) Carrier mobility  
Keyword(4) DIBL  
Keyword(5) high-k dielectric  
Keyword(6) Metal gate electrode  
Keyword(7)  
Keyword(8)  
1st Author's Name Masakazu Goto  
1st Author's Affiliation Toshiba Semiconductor Company (Toshiba)
2nd Author's Name Shigeru Kawanaka  
2nd Author's Affiliation Toshiba Semiconductor Company (Toshiba)
3rd Author's Name Seiji Inumiya  
3rd Author's Affiliation Toshiba Semiconductor Company (Toshiba)
4th Author's Name Naoki Kusunoki  
4th Author's Affiliation Toshiba Semiconductor Company (Toshiba)
5th Author's Name Masumi Saitoh  
5th Author's Affiliation Toshiba R&D Center (Toshiba)
6th Author's Name Kosuke Tatsumura  
6th Author's Affiliation Toshiba R&D Center (Toshiba)
7th Author's Name Atsuhiro Kinoshita  
7th Author's Affiliation Toshiba R&D Center (Toshiba)
8th Author's Name Satoshi Inaba  
8th Author's Affiliation Toshiba Semiconductor Company (Toshiba)
9th Author's Name Yoshiaki Toyoshima  
9th Author's Affiliation Toshiba Semiconductor Company (Toshiba)
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Speaker
Date Time 2009-07-16 15:50:00 
Presentation Time 25 
Registration for SDM 
Paper # IEICE-SDM2009-107,IEICE-ICD2009-23 
Volume (vol) IEICE-109 
Number (no) no.133(SDM), no.134(ICD) 
Page pp.53-56 
#Pages IEICE-4 
Date of Issue IEICE-SDM-2009-07-09,IEICE-ICD-2009-07-09 


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