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Paper Abstract and Keywords
Presentation 2009-06-11 15:05
Parallel Implementaion of Harris Corner Detector for Cell Broadband Engine
Hiroki Sugano (Kyoto Univ.), Ryusuke Miyamoto (Nara Inst. of Sci and Tech.) SIS2009-9
Abstract (in Japanese) (See Japanese page) 
(in English) Feature point extraction is necessary to estimate a camera motion
or reconstruct object shapes from image sequences.
If these applications are performed on embedded systems such as robotics and
automobile, there are some other processing of the feature point extraction.
It is difficult to perform all processing on an embedded processor in real-time.
Therefore specialized processors or multi-core processors are required.
This paper shows the parallel implementation of the feature point extraction
on Cell Broadband Engine, which is the embedded multi-core processor.
The processing time of our implementation is 5 times faster than that of
the Intel processor.
Keyword (in Japanese) (See Japanese page) 
(in English) Harris operator / Cell Broadband Engine / multi-core / real time processing / parallel implementation / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 78, SIS2009-9, pp. 49-54, June 2009.
Paper # SIS2009-9 
Date of Issue 2009-06-04 (SIS) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
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reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF SIS2009-9

Conference Information
Committee SIS  
Conference Date 2009-06-11 - 2009-06-12 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To SIS 
Conference Code 2009-06-SIS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Parallel Implementaion of Harris Corner Detector for Cell Broadband Engine 
Sub Title (in English)  
Keyword(1) Harris operator  
Keyword(2) Cell Broadband Engine  
Keyword(3) multi-core  
Keyword(4) real time processing  
Keyword(5) parallel implementation  
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Keyword(8)  
1st Author's Name Hiroki Sugano  
1st Author's Affiliation Kyoto University (Kyoto Univ.)
2nd Author's Name Ryusuke Miyamoto  
2nd Author's Affiliation Nara Institute of Science and Technology (Nara Inst. of Sci and Tech.)
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Speaker
Date Time 2009-06-11 15:05:00 
Presentation Time 20 
Registration for SIS 
Paper # IEICE-SIS2009-9 
Volume (vol) IEICE-109 
Number (no) no.78 
Page pp.49-54 
#Pages IEICE-6 
Date of Issue IEICE-SIS-2009-06-04 


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