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Paper Abstract and Keywords
Presentation 2009-05-15 10:00
A low-power clustering tool using both routability and activity for FPGAs
Junya Eto, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2009-10
Abstract (in Japanese) (See Japanese page) 
(in English) Although FPGA(Field Programmable Gate Array) has high exibility, there is a problem that power consumption is larger than ASIC(Application Specific Integrated Circuit). The manufacturing process of FPGA
faces the deep-sub-micron era, and the proportion of a static power in power consumption is growing relatively now. Therefore, it is necessary to reduce not only a dynamic power but also a static power to improve power consumption. As an improvement at the EDA(Electronic Design Automation) level of this problem, we propose a new power-aware
clustering tool using both activity as a reduction of the dynamic power and routability as a reduction of the static power for cluster-based FPGA. As a result, the average power improvement is 26.1% over T-RPack and 1.7% over P-T-VPack.
Keyword (in Japanese) (See Japanese page) 
(in English) clustering / cluster-based FPGA / low-power / switching activity / routability / / /  
Reference Info. IEICE Tech. Rep., vol. 109, no. 26, RECONF2009-10, pp. 55-60, May 2009.
Paper # RECONF2009-10 
Date of Issue 2009-05-07 (RECONF) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF RECONF2009-10

Conference Information
Committee RECONF  
Conference Date 2009-05-14 - 2009-05-15 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English)  
Paper Information
Registration To RECONF 
Conference Code 2009-05-RECONF 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A low-power clustering tool using both routability and activity for FPGAs 
Sub Title (in English)  
Keyword(1) clustering  
Keyword(2) cluster-based FPGA  
Keyword(3) low-power  
Keyword(4) switching activity  
Keyword(5) routability  
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1st Author's Name Junya Eto  
1st Author's Affiliation Kumamoto University (Kumamoto Univ.)
2nd Author's Name Motoki Amagasaki  
2nd Author's Affiliation Kumamoto University (Kumamoto Univ.)
3rd Author's Name Masahiro Iida  
3rd Author's Affiliation Kumamoto University (Kumamoto Univ.)
4th Author's Name Toshinori Sueyoshi  
4th Author's Affiliation Kumamoto University (Kumamoto Univ.)
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Speaker
Date Time 2009-05-15 10:00:00 
Presentation Time 30 
Registration for RECONF 
Paper # IEICE-RECONF2009-10 
Volume (vol) IEICE-109 
Number (no) no.26 
Page pp.55-60 
#Pages IEICE-6 
Date of Issue IEICE-RECONF-2009-05-07 


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