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| Presentation | 2009-04-21 11:00 Highly Reliable Sequential Circuits Considering Multiple Simultaneous Transient Faults Hideo Kohinata, Kohei Marumoto, Masayuki Arai, Satoshi Fukumoto (Tokyo Metropolitan Univ.)  CPSY2009-1 DC2009-1 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This paper proposes a novel technique to improve the reliability of sequential circuits. The proposed technique adopts the space-time redundancy which improves the reliability to multiple transient faults. The supposed fault model for this technique is the one in which multiple flip-flop circuits receive wrong data due to noise through signal lines of combinational circuits. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | Transient fault / Sequential circuits / / / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 109, no. 12, DC2009-1, pp. 1-6, April 2009. | |
| Paper # | DC2009-1 | |
| Date of Issue | 2009-04-14 (CPSY, DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | CPSY2009-1 DC2009-1 |
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| Conference Information | |
| Committee | DC CPSY |
| Conference Date | 2009-04-21 - 2009-04-21 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Akihabara Satellite Campus, Tokyo Metropolitan Univ. |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Dependable Computer Systems, Security Technology, etc. |
| Paper Information | |
| Registration To | DC |
| Conference Code | 2009-04-DC-CPSY |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Highly Reliable Sequential Circuits Considering Multiple Simultaneous Transient Faults |
| Sub Title (in English) | |
| Keyword(1) | Transient fault |
| Keyword(2) | Sequential circuits |
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| 1st Author's Name | Hideo Kohinata |
| 1st Author's Affiliation | Tokyo Metropolitan Univesity (Tokyo Metropolitan Univ.) |
| 2nd Author's Name | Kohei Marumoto |
| 2nd Author's Affiliation | Tokyo Metropolitan Univesity (Tokyo Metropolitan Univ.) |
| 3rd Author's Name | Masayuki Arai |
| 3rd Author's Affiliation | Tokyo Metropolitan Univesity (Tokyo Metropolitan Univ.) |
| 4th Author's Name | Satoshi Fukumoto |
| 4th Author's Affiliation | Tokyo Metropolitan Univesity (Tokyo Metropolitan Univ.) |
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| Speaker | Author-1 |
| Date Time | 2009-04-21 11:00:00 |
| Presentation Time | 25 minutes |
| Registration for | DC |
| Paper # | CPSY2009-1, DC2009-1 |
| Volume (vol) | vol.109 |
| Number (no) | no.11(CPSY), no.12(DC) |
| Page | pp.1-6 |
| #Pages | 6 |
| Date of Issue | 2009-04-14 (CPSY, DC) |
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