Paper Abstract and Keywords |
Presentation |
2009-03-13 11:05
Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in Subthreshold Circuits Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye (Osaka Univ./JST-CREST) VLD2008-160 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper presents modeling of manufacturing variability and
body bias effect for subthreshold circuits
based on measurement of a device array circuit in a 90nm technology.
The device array consists of P/NMOS transistors and ring oscillators.
This work verifies the correlation between the variation model extracted from
I-V measurement results and oscillation frequencies, which means
the transistor-level variation model is examined and confirmed in terms of circuit performance.
We demonstrate that delay variations of subthreshold circuits are
well characterized with two parameters - threshold voltage and
subthreshold swing parameter.
We also reveal that threshold voltage shift by body biasing can be
modeled deterministically. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
subthreshold circuit / manufacturing variability / measurement / variability modeling / body biasing / / / |
Reference Info. |
IEICE Tech. Rep., vol. 108, no. 478, VLD2008-160, pp. 201-206, March 2009. |
Paper # |
VLD2008-160 |
Date of Issue |
2009-03-04 (VLD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
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VLD2008-160 |
Conference Information |
Committee |
VLD |
Conference Date |
2009-03-11 - 2009-03-13 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
|
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
Design Technology for a System-on-Silicon |
Paper Information |
Registration To |
VLD |
Conference Code |
2009-03-VLD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Correlation Verification between Transistor Variability Model with Body Biasing and Ring Oscillation Frequency in Subthreshold Circuits |
Sub Title (in English) |
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Keyword(1) |
subthreshold circuit |
Keyword(2) |
manufacturing variability |
Keyword(3) |
measurement |
Keyword(4) |
variability modeling |
Keyword(5) |
body biasing |
Keyword(6) |
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Keyword(7) |
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Keyword(8) |
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1st Author's Name |
Hiroshi Fuketa |
1st Author's Affiliation |
Osaka University/JST-CREST (Osaka Univ./JST-CREST) |
2nd Author's Name |
Masanori Hashimoto |
2nd Author's Affiliation |
Osaka University/JST-CREST (Osaka Univ./JST-CREST) |
3rd Author's Name |
Yukio Mitsuyama |
3rd Author's Affiliation |
Osaka University/JST-CREST (Osaka Univ./JST-CREST) |
4th Author's Name |
Takao Onoye |
4th Author's Affiliation |
Osaka University/JST-CREST (Osaka Univ./JST-CREST) |
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Speaker |
Author-1 |
Date Time |
2009-03-13 11:05:00 |
Presentation Time |
25 minutes |
Registration for |
VLD |
Paper # |
VLD2008-160 |
Volume (vol) |
vol.108 |
Number (no) |
no.478 |
Page |
pp.201-206 |
#Pages |
6 |
Date of Issue |
2009-03-04 (VLD) |