IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2009-03-13 13:50
Performance Evaluations of nMOS Level Shifter Circuits
Makoto Otsu, Shuji Tsukiyama (Chuo Univ.), Isao Shirakawa (Univ. of Hyogo), Shuji Nishi, Tomoyuki Nagai, Yasushi Kubota (Sharp Corp.) VLD2008-164
Abstract (in Japanese) (See Japanese page) 
(in English) Driver circuits for small liquid crystal displays are usually formed on the same glass as the liquid crystal. Hence, if they are composed of nMOS transistors only, then the production cost can be reduced by eliminating the pMOS process. In this paper, we propose three new nMOS level shifters, which are one of important basic module of the driver circuit, and evaluate their performances by comparing with the previous circuits from the view points of area, delay, power, and tolerance to the variability of threshold voltage. Moreover, based on the comparisons, we propose a new design method to increase the tolerance to the variability of threshold voltage.
Keyword (in Japanese) (See Japanese page) 
(in English) nMOS level shifter / circuit performance / evaluation method / tolerance to variability / liquid crystal display / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 478, VLD2008-164, pp. 225-230, March 2009.
Paper # VLD2008-164 
Date of Issue 2009-03-04 (VLD) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF VLD2008-164

Conference Information
Committee VLD  
Conference Date 2009-03-11 - 2009-03-13 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for a System-on-Silicon 
Paper Information
Registration To VLD 
Conference Code 2009-03-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Performance Evaluations of nMOS Level Shifter Circuits 
Sub Title (in English)  
Keyword(1) nMOS level shifter  
Keyword(2) circuit performance  
Keyword(3) evaluation method  
Keyword(4) tolerance to variability  
Keyword(5) liquid crystal display  
1st Author's Name Makoto Otsu  
1st Author's Affiliation Chuo University (Chuo Univ.)
2nd Author's Name Shuji Tsukiyama  
2nd Author's Affiliation Chuo University (Chuo Univ.)
3rd Author's Name Isao Shirakawa  
3rd Author's Affiliation University of Hyogo (Univ. of Hyogo)
4th Author's Name Shuji Nishi  
4th Author's Affiliation Sharp Corporation (Sharp Corp.)
5th Author's Name Tomoyuki Nagai  
5th Author's Affiliation Sharp Corporation (Sharp Corp.)
6th Author's Name Yasushi Kubota  
6th Author's Affiliation Sharp Corporation (Sharp Corp.)
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Date Time 2009-03-13 13:50:00 
Presentation Time 25 
Registration for VLD 
Paper # IEICE-VLD2008-164 
Volume (vol) IEICE-108 
Number (no) no.478 
Page pp.225-230 
#Pages IEICE-6 
Date of Issue IEICE-VLD-2009-03-04 

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan