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Paper Abstract and Keywords
Presentation 2009-03-12 14:50
A ring segmented bus architrcture for Globally Asynchronous Locally Synchronous System
Masafumi Kondo, Yoichiro Sato (Okayama Prefectural Univ), Kazuyuki Tashiro (FUJITSU TEN), Tomoyuki Yokogawa, Michiyoshi Hayase (Okayama Prefectural Univ) VLD2008-149
Abstract (in Japanese) (See Japanese page) 
(in English) Recently, most digital systems are designed as GALS (Globally Asynchronous Locally Synchronous) systems.
Several architectures have been proposed as bus architectures for a GALS system : shared bus, segmented bus, ring bus, and so on.
In this study, we propose a ring segmented bus architecture which is a combination of segmented bus and ring bus architecture with the aim of throughput enhancement.
In a segmented bus architecture, segments are connected in series.
By connecting the segments at the end of the bus and constructing the ring bus, it becomes possible to allocate a channel of the bus bidirectionally.
The bus channel is allocated to the shortest path between segments.
We consider a metastable operation caused by asynchronous communication between segments and a burst transfer between segments.
According to the result of simulation, it is shown that the GALS system designed by the proposed method has the desired operations.
Keyword (in Japanese) (See Japanese page) 
(in English) GALS system / bus architecture / segmeted bus / ring bus / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 478, VLD2008-149, pp. 135-140, March 2009.
Paper # VLD2008-149 
Date of Issue 2009-03-04 (VLD) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee VLD  
Conference Date 2009-03-11 - 2009-03-13 
Place (in Japanese) (See Japanese page) 
Place (in English)  
Topics (in Japanese) (See Japanese page) 
Topics (in English) Design Technology for a System-on-Silicon 
Paper Information
Registration To VLD 
Conference Code 2009-03-VLD 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) A ring segmented bus architrcture for Globally Asynchronous Locally Synchronous System 
Sub Title (in English)  
Keyword(1) GALS system  
Keyword(2) bus architecture  
Keyword(3) segmeted bus  
Keyword(4) ring bus  
Keyword(5)  
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1st Author's Name Masafumi Kondo  
1st Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ)
2nd Author's Name Yoichiro Sato  
2nd Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ)
3rd Author's Name Kazuyuki Tashiro  
3rd Author's Affiliation FUJITSU TEN (FUJITSU TEN)
4th Author's Name Tomoyuki Yokogawa  
4th Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ)
5th Author's Name Michiyoshi Hayase  
5th Author's Affiliation Okayama Prefectural University (Okayama Prefectural Univ)
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Speaker Author-1 
Date Time 2009-03-12 14:50:00 
Presentation Time 25 minutes 
Registration for VLD 
Paper # VLD2008-149 
Volume (vol) vol.108 
Number (no) no.478 
Page pp.135-140 
#Pages
Date of Issue 2009-03-04 (VLD) 


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