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Paper Abstract and Keywords
Presentation 2009-03-05 15:45
[Special Talk] System Realizations by Using Embedded Memories in FPGAs
Yukihiro Iguchi (Meiji Univ.)
Abstract (in Japanese) (See Japanese page) 
(in English) FPGAs (Field Programmable Gate Arrays) have many embedded RAMs.
We can use them for register files, FIFO (First In, First Out) memories,
stack memories, and storages for embedded MPUs.

This paper introduces LUT (Look-Up Table) cascade methods which realize logic functions by cascading memories, and their applications.
Keyword (in Japanese) (See Japanese page) 
(in English) FPGA / embedded memory / LUT cascades / reconfigurable system / logic circuit / programmable device / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 461, SIS2008-80, pp. 49-54, March 2009.
Paper # SIS2008-80 
Date of Issue 2009-02-26 (SIS) 
ISSN Print edition: ISSN 0913-5685    Online edition: ISSN 2432-6380
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Conference Information
Committee SIS  
Conference Date 2009-03-05 - 2009-03-06 
Place (in Japanese) (See Japanese page) 
Place (in English)  
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Paper Information
Registration To SIS 
Conference Code 2009-03-SIS 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) System Realizations by Using Embedded Memories in FPGAs 
Sub Title (in English)  
Keyword(1) FPGA  
Keyword(2) embedded memory  
Keyword(3) LUT cascades  
Keyword(4) reconfigurable system  
Keyword(5) logic circuit  
Keyword(6) programmable device  
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1st Author's Name Yukihiro Iguchi  
1st Author's Affiliation Meiji University (Meiji Univ.)
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Speaker Author-1 
Date Time 2009-03-05 15:45:00 
Presentation Time 60 minutes 
Registration for SIS 
Paper # SIS2008-80 
Volume (vol) vol.108 
Number (no) no.461 
Page pp.49-54 
#Pages
Date of Issue 2009-02-26 (SIS) 


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