IEICE Technical Committee Submission System
Conference Paper's Information
Online Proceedings
[Sign in]
Tech. Rep. Archives
 Go Top Page Go Previous   [Japanese] / [English] 

Paper Abstract and Keywords
Presentation 2009-01-29 13:00
On Upper and Lower Bounds of Optimal Execution Time of Task Graph by Considering Communication Delays
Takashi Otsuka, Masato Nakahara, Qi-Wei Ge, Mitsuru Nakata (Yamaguchi Univ.), Yuu Moriyama, Hirotoshi Tonou (Fujitsu TEN Limited) CST2008-41
Abstract (in Japanese) (See Japanese page) 
(in English) This paper deals with upper and lower bounds of optimal execution time of task graphs that are supposed to be executed in a model of multiprocessor system, in which communication times are taken into account. We firstly define a path-dependent minimum subnet whose execution time is the shortest when executed by a single processor. Based on this definition, we then define a critical subnet of task graphs, which is the minimum subnet with the maximum execution time. Analyzing the properties of the minimum subnet and the critical subnet, we finally give the upper and lower bounds of optimal execution time of task graphs.
Keyword (in Japanese) (See Japanese page) 
(in English) multiprocessor scheduling / communication time / minimum subnet / critical subnet / upper bound / lower bound / /  
Reference Info. IEICE Tech. Rep., vol. 108, Jan. 2009.
Paper #  
Date of Issue 2009-01-22 (CST) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
Download PDF CST2008-41

Conference Information
Committee MSS  
Conference Date 2009-01-29 - 2009-01-30 
Place (in Japanese) (See Japanese page) 
Place (in English) Kanagawa Industrial Promotion Center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Concurrent Systems 
Paper Information
Registration To MSS 
Conference Code 2009-01-CST 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) On Upper and Lower Bounds of Optimal Execution Time of Task Graph by Considering Communication Delays 
Sub Title (in English)  
Keyword(1) multiprocessor scheduling  
Keyword(2) communication time  
Keyword(3) minimum subnet  
Keyword(4) critical subnet  
Keyword(5) upper bound  
Keyword(6) lower bound  
1st Author's Name Takashi Otsuka  
1st Author's Affiliation Yamaguchi University (Yamaguchi Univ.)
2nd Author's Name Masato Nakahara  
2nd Author's Affiliation Yamaguchi University (Yamaguchi Univ.)
3rd Author's Name Qi-Wei Ge  
3rd Author's Affiliation Yamaguchi University (Yamaguchi Univ.)
4th Author's Name Mitsuru Nakata  
4th Author's Affiliation Yamaguchi University (Yamaguchi Univ.)
5th Author's Name Yuu Moriyama  
5th Author's Affiliation Fujitsu TEN Limited (Fujitsu TEN Limited)
6th Author's Name Hirotoshi Tonou  
6th Author's Affiliation Fujitsu TEN Limited (Fujitsu TEN Limited)
7th Author's Name  
7th Author's Affiliation ()
8th Author's Name  
8th Author's Affiliation ()
9th Author's Name  
9th Author's Affiliation ()
10th Author's Name  
10th Author's Affiliation ()
11th Author's Name  
11th Author's Affiliation ()
12th Author's Name  
12th Author's Affiliation ()
13th Author's Name  
13th Author's Affiliation ()
14th Author's Name  
14th Author's Affiliation ()
15th Author's Name  
15th Author's Affiliation ()
16th Author's Name  
16th Author's Affiliation ()
17th Author's Name  
17th Author's Affiliation ()
18th Author's Name  
18th Author's Affiliation ()
19th Author's Name  
19th Author's Affiliation ()
20th Author's Name  
20th Author's Affiliation ()
Date Time 2009-01-29 13:00:00 
Presentation Time 25 
Registration for MSS 
Paper # IEICE-CST2008-41 
Volume (vol) IEICE-108 
Number (no) no.415 
Page pp.1-4 
#Pages IEICE-4 
Date of Issue IEICE-CST-2009-01-22 

[Return to Top Page]

[Return to IEICE Web Page]

The Institute of Electronics, Information and Communication Engineers (IEICE), Japan