Paper Abstract and Keywords |
Presentation |
2009-01-23 16:35
Manufacturing Technology for Embedded LSI(WLP) Substrates Keisuke Okada (NEC Toppan Circuit Solutions. INC.) EMD2008-119 Link to ES Tech. Rep. Archives: EMD2008-119 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
Device embedding technologies that make three-dimensional effective utilization of packaging space possible have attracted attention for downsizing and becoming high-density modules and SiP/PoP. For embedding LSI without using conventional mounting technique, there is an embedded LSI (WLP) substrate technology that utilizes WLP with a copper post. This paper introduces the structure, features, manufacturing processes, inspection technology, and reliability assessment technology of the embedded WLP substrates. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
JISSO / Build-up substrate / embedded passive and active devices substrate / module / WLP / Device embedding technologies / / |
Reference Info. |
IEICE Tech. Rep., vol. 108, no. 404, EMD2008-119, pp. 33-37, Jan. 2009. |
Paper # |
EMD2008-119 |
Date of Issue |
2009-01-16 (EMD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
EMD2008-119 Link to ES Tech. Rep. Archives: EMD2008-119 |
Conference Information |
Committee |
EMD |
Conference Date |
2009-01-23 - 2009-01-23 |
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(See Japanese page) |
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Paper Information |
Registration To |
EMD |
Conference Code |
2009-01-EMD |
Language |
Japanese |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Manufacturing Technology for Embedded LSI(WLP) Substrates |
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JISSO |
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Build-up substrate |
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embedded passive and active devices substrate |
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module |
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WLP |
Keyword(6) |
Device embedding technologies |
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1st Author's Name |
Keisuke Okada |
1st Author's Affiliation |
NEC TOPPAN CIRCUIT SOLUTIONS, INC. (NEC Toppan Circuit Solutions. INC.) |
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Speaker |
Author-1 |
Date Time |
2009-01-23 16:35:00 |
Presentation Time |
25 minutes |
Registration for |
EMD |
Paper # |
EMD2008-119 |
Volume (vol) |
vol.108 |
Number (no) |
no.404 |
Page |
pp.33-37 |
#Pages |
5 |
Date of Issue |
2009-01-16 (EMD) |
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