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| Presentation | 2008-11-19 10:00 Variable Scheduling and Binding for High-Level Synthesis Considering Indefinite Cycle Operations Yuki Toda, Nagisa Ishiura, Kousuke Sone (Kwansei Gakuin Univ.)  VLD2008-83 DC2008-51 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | This article presents variable scheduling and binding for high-level synthesis. Conventional scheduling algorithms decide the operations' execution timing assuming that each operation takes a fixed number of cycles. However, on some operations such as memory accesses and serial multiplication/division, the number of cycles for the operation may vary depending on the values of operands or the states of the hardware. The variable scheduling enables efficient computation in the presence of such indefinite cycle operations where that timing of each operation execution is adaptively decided depending on the completion signals from the functional units. Experimental results show that the number of the execution cycles are reduced by 16 -- 31%, although the number of states are increased as compared with the conventional scheduling algorithms. |
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| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | high-level synthesis / behavioral synthesis / variable scheduling / indefinite cycle operation / / / / | |
| Reference Info. | IEICE Tech. Rep., vol. 108, no. 298, VLD2008-83, pp. 139-144, Nov. 2008. | |
| Paper # | VLD2008-83 | |
| Date of Issue | 2008-11-10 (VLD, DC) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | VLD2008-83 DC2008-51 |
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| Conference Information | |
| Committee | VLD DC IPSJ-SLDM CPSY RECONF ICD CPM |
| Conference Date | 2008-11-17 - 2008-11-19 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | Kitakyushu Science and Research Park |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Design Gaia 2008 ―New field of VLSI design― |
| Paper Information | |
| Registration To | VLD |
| Conference Code | 2008-11-VLD-DC-SLDM-CPSY-RECONF-ICD-CPM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Variable Scheduling and Binding for High-Level Synthesis Considering Indefinite Cycle Operations |
| Sub Title (in English) | |
| Keyword(1) | high-level synthesis |
| Keyword(2) | behavioral synthesis |
| Keyword(3) | variable scheduling |
| Keyword(4) | indefinite cycle operation |
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| 1st Author's Name | Yuki Toda |
| 1st Author's Affiliation | Kwansei Gakuin University (Kwansei Gakuin Univ.) |
| 2nd Author's Name | Nagisa Ishiura |
| 2nd Author's Affiliation | Kwansei Gakuin University (Kwansei Gakuin Univ.) |
| 3rd Author's Name | Kousuke Sone |
| 3rd Author's Affiliation | Kwansei Gakuin University (Kwansei Gakuin Univ.) |
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| Speaker | Author-1 |
| Date Time | 2008-11-19 10:00:00 |
| Presentation Time | 25 minutes |
| Registration for | VLD |
| Paper # | VLD2008-83, DC2008-51 |
| Volume (vol) | vol.108 |
| Number (no) | no.298(VLD), no.299(DC) |
| Page | pp.139-144 |
| #Pages | 6 |
| Date of Issue | 2008-11-10 (VLD, DC) |
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