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Paper Abstract and Keywords
Presentation 2008-10-24 11:35
Preliminary Analysis of Low Power Multi-Core CPU for Wireless Sensor Node
Sotaro Ohara, Makoto Suzuki, Shunsuke Saruwatari, Masateru Minami, Hiroyuki Morikawa (The University of Tokyo) USN2008-59
Abstract (in Japanese) (See Japanese page) 
(in English) For wireless nensor nodes, it is important to reduse power consumption while completing tasks within their deadline. We are developing a multi-core CPU can reduce power consumption enabling users to easily manage hard real-time tasks. This paper presents initial experiment about power consumption of a multi-core CPU we are developing. We run the benchmarks on the prototyped multi-CPU sensor node and measure its power consumption with changing a number of CPUs. The results show a sensor node with triple CPUs can eliminate about 70 % of power consumption compared to a single CPU sensor node.
Keyword (in Japanese) (See Japanese page) 
(in English) Wireless Sensor Networks / Multi-Core CPU / Power Consumption / Hard Real-Time / / / /  
Reference Info. IEICE Tech. Rep., vol. 108, no. 252, USN2008-59, pp. 123-128, Oct. 2008.
Paper # USN2008-59 
Date of Issue 2008-10-15 (USN) 
ISSN Print edition: ISSN 0913-5685  Online edition: ISSN 2432-6380
Copyright
and
reproduction
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (No. 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034)
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Conference Information
Committee SR RCS USN AN  
Conference Date 2008-10-22 - 2008-10-24 
Place (in Japanese) (See Japanese page) 
Place (in English) Okinawa industry support center 
Topics (in Japanese) (See Japanese page) 
Topics (in English) Wireless discributed network special session and general session 
Paper Information
Registration To USN 
Conference Code 2008-10-SR-RCS-USN-AN 
Language Japanese 
Title (in Japanese) (See Japanese page) 
Sub Title (in Japanese) (See Japanese page) 
Title (in English) Preliminary Analysis of Low Power Multi-Core CPU for Wireless Sensor Node 
Sub Title (in English)  
Keyword(1) Wireless Sensor Networks  
Keyword(2) Multi-Core CPU  
Keyword(3) Power Consumption  
Keyword(4) Hard Real-Time  
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1st Author's Name Sotaro Ohara  
1st Author's Affiliation The University of Tokyo (The University of Tokyo)
2nd Author's Name Makoto Suzuki  
2nd Author's Affiliation The University of Tokyo (The University of Tokyo)
3rd Author's Name Shunsuke Saruwatari  
3rd Author's Affiliation The University of Tokyo (The University of Tokyo)
4th Author's Name Masateru Minami  
4th Author's Affiliation The University of Tokyo (The University of Tokyo)
5th Author's Name Hiroyuki Morikawa  
5th Author's Affiliation The University of Tokyo (The University of Tokyo)
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Speaker
Date Time 2008-10-24 11:35:00 
Presentation Time 20 
Registration for USN 
Paper # IEICE-USN2008-59 
Volume (vol) IEICE-108 
Number (no) no.252 
Page pp.123-128 
#Pages IEICE-6 
Date of Issue IEICE-USN-2008-10-15 


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