講演抄録/キーワード |
講演名 |
2008-07-11 13:50
Study on Gate Around Transistor (GAT) Layout for Radiation Hardness ○Min-su Lee・Young-Soo Lee・Chul-Bum Kim・Young-Ho Kim(KAIST)・Byoung-Gon Yu・Hee Chul Lee(ETRI) ED2008-91 SDM2008-110 エレソ技報アーカイブへのリンク:ED2008-91 SDM2008-110 |
抄録 |
(和) |
We designed a Gate Around Transistor (GAT) layout for radiation hardness. A GAT MOSFET layout with an improved guard ring structure has been fabricated. The Vg-Id and Vd-Id curves are measured before and after exposure to 1Mrad gamma (・? radiation with a 250krad/hr dose rate. The GAT layout structure shows immunity to radiation. The Vg-Id curve is almost unchanged and leakage current is slightly increased. The effective W/L ratio of the GAT layout is measured and simulated. The GAT layout structure is applied to a source follower schematic. Characteristics of the source follower are measured before and after exposure to 1Mrad gamma (・? radiation with a 250krad/hr dose rate. Characteristics of the source follower are almost unchanged. A chip was fabricated using commercial 0.35 micron CMOS technology. |
(英) |
We designed a Gate Around Transistor (GAT) layout for radiation hardness. A GAT MOSFET layout with an improved guard ring structure has been fabricated. The Vg-Id and Vd-Id curves are measured before and after exposure to 1Mrad gamma (・? radiation with a 250krad/hr dose rate. The GAT layout structure shows immunity to radiation. The Vg-Id curve is almost unchanged and leakage current is slightly increased. The effective W/L ratio of the GAT layout is measured and simulated. The GAT layout structure is applied to a source follower schematic. Characteristics of the source follower are measured before and after exposure to 1Mrad gamma (・? radiation with a 250krad/hr dose rate. Characteristics of the source follower are almost unchanged. A chip was fabricated using commercial 0.35 micron CMOS technology. |
キーワード |
(和) |
Gate Around Transistor layout / GAT / Radiation hardness / Radiation Hardening By Design / RHBD / 0.35 micorn CMOS technology / STI oxide / Leakage current |
(英) |
Gate Around Transistor layout / GAT / Radiation hardness / Radiation Hardening By Design / RHBD / 0.35 micorn CMOS technology / STI oxide / Leakage current |
文献情報 |
信学技報, vol. 108, no. 122, SDM2008-110, pp. 275-280, 2008年7月. |
資料番号 |
SDM2008-110 |
発行日 |
2008-07-02 (ED, SDM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
著作権に ついて |
技術研究報告に掲載された論文の著作権は電子情報通信学会に帰属します.(許諾番号:10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
PDFダウンロード |
ED2008-91 SDM2008-110 エレソ技報アーカイブへのリンク:ED2008-91 SDM2008-110 |