Paper Abstract and Keywords |
Presentation |
2008-07-11 11:35
CMOS Digitally Controlled Programmable Gain Amplifier (PGA) with DC Offset Cancellation Kyunghoon Kim, Jinwook Burn (Sogang Univ.) ED2008-85 SDM2008-104 Link to ES Tech. Rep. Archives: ED2008-85 SDM2008-104 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper presents a programmable gain amplifier (PGA) to integrate a RF direct-conversion receiver for DVB-H / T-DMB standards. The proposed CMOS PGA includes both a digital controlled gain amplifier to improve linearity and DC input offset voltage cancellation. The PGA for the mobile TVs requires specifications such as 3-dB bandwidth of 1MHz and wide dynamic range of more than 40 dB.
The PGA is composed of three parts, an amplification core, a digital gain control circuit and a DC offset cancellation circuit. The PGA (amplification) core block is a current mode amplifier with a digital gain controller consists of switched resister array structure. The DC offset cancellation block is based on RC low-pass filter which is connected to input of the PGA core to feedback a nearly DC signal , so that nearly DC signal has a high close-loop gain for elimination of the offset voltage.
The proposed PGA is designed using TSMC 0.25 µm CMOS technology library, and which shows dynamic range of 40 dB with 2.5 dB gain steps throughout 2 MHz desired -3-dB bandwidth. All Circuits were designed with the supply voltage of 3.3V. The power dissipation is 8.36mW |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
PGA / GAIN / Digitally / Amplifier / Offset / Cancellation / / |
Reference Info. |
IEICE Tech. Rep., vol. 108, no. 122, SDM2008-104, pp. 243-248, July 2008. |
Paper # |
SDM2008-104 |
Date of Issue |
2008-07-02 (ED, SDM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
ED2008-85 SDM2008-104 Link to ES Tech. Rep. Archives: ED2008-85 SDM2008-104 |
Conference Information |
Committee |
SDM ED |
Conference Date |
2008-07-09 - 2008-07-11 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kaderu2・7 |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices |
Paper Information |
Registration To |
SDM |
Conference Code |
2008-07-SDM-ED |
Language |
English |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
CMOS Digitally Controlled Programmable Gain Amplifier (PGA) with DC Offset Cancellation |
Sub Title (in English) |
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PGA |
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GAIN |
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Digitally |
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Amplifier |
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Offset |
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Cancellation |
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1st Author's Name |
Kyunghoon Kim |
1st Author's Affiliation |
Sogang University (Sogang Univ.) |
2nd Author's Name |
Jinwook Burn |
2nd Author's Affiliation |
Sogang University (Sogang Univ.) |
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Speaker |
Author-1 |
Date Time |
2008-07-11 11:35:00 |
Presentation Time |
15 minutes |
Registration for |
SDM |
Paper # |
ED2008-85, SDM2008-104 |
Volume (vol) |
vol.108 |
Number (no) |
no.121(ED), no.122(SDM) |
Page |
pp.243-248 |
#Pages |
6 |
Date of Issue |
2008-07-02 (ED, SDM) |
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