Paper Abstract and Keywords |
Presentation |
2008-07-10 09:15
Simulation of Retention Characteristics in Double-Gate Structure Multi-bit SONOS Flash Memories Doo-Hyun Kim, Il Han Park, Byung-Gook Park (Seoul National Univ.) ED2008-55 SDM2008-74 Link to ES Tech. Rep. Archives: ED2008-55 SDM2008-74 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper presents a detailed study of the retention characteristics in scaled multi-bit SONOS flash memories. By calculating the oxide field and tunneling currents, we evaluate the charge trapping mechanism. We calculate transient retention dynamics with the ONO fields, trapped charge, and tunneling currents. All the parameters were obtained by physics-based equations and without any fitting parameters or optimization steps. The results can be used with nanoscale nonvolatile memory. This modeling accounts for the VT shift as a function of trapped charge, time, and thickness of silicon oxide and silicon nitride layers, and can be used for optimizing the ONO geometry and parameters for maximum performance. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
SONOS / flash memory / retention / double-gate / multi-bit / nitride-based charge trap memory / / |
Reference Info. |
IEICE Tech. Rep., vol. 108, no. 122, SDM2008-74, pp. 81-84, July 2008. |
Paper # |
SDM2008-74 |
Date of Issue |
2008-07-02 (ED, SDM) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) |
Download PDF |
ED2008-55 SDM2008-74 Link to ES Tech. Rep. Archives: ED2008-55 SDM2008-74 |
Conference Information |
Committee |
SDM ED |
Conference Date |
2008-07-09 - 2008-07-11 |
Place (in Japanese) |
(See Japanese page) |
Place (in English) |
Kaderu2・7 |
Topics (in Japanese) |
(See Japanese page) |
Topics (in English) |
2008 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices |
Paper Information |
Registration To |
SDM |
Conference Code |
2008-07-SDM-ED |
Language |
English |
Title (in Japanese) |
(See Japanese page) |
Sub Title (in Japanese) |
(See Japanese page) |
Title (in English) |
Simulation of Retention Characteristics in Double-Gate Structure Multi-bit SONOS Flash Memories |
Sub Title (in English) |
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Keyword(1) |
SONOS |
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flash memory |
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retention |
Keyword(4) |
double-gate |
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multi-bit |
Keyword(6) |
nitride-based charge trap memory |
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1st Author's Name |
Doo-Hyun Kim |
1st Author's Affiliation |
Seoul National University (Seoul National Univ.) |
2nd Author's Name |
Il Han Park |
2nd Author's Affiliation |
Seoul National University (Seoul National Univ.) |
3rd Author's Name |
Byung-Gook Park |
3rd Author's Affiliation |
Seoul National University (Seoul National Univ.) |
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Speaker |
Author-1 |
Date Time |
2008-07-10 09:15:00 |
Presentation Time |
15 minutes |
Registration for |
SDM |
Paper # |
ED2008-55, SDM2008-74 |
Volume (vol) |
vol.108 |
Number (no) |
no.121(ED), no.122(SDM) |
Page |
pp.81-84 |
#Pages |
4 |
Date of Issue |
2008-07-02 (ED, SDM) |
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