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| Presentation | 2008-06-10 09:55 Gate Dielectrics Interface Control for III-V MISFET Tetsuji Yasuda, Noriyuki Miyata (AIST), Akihiro Ohtake (NIMS)  SDM2008-49 Link to ES Tech. Rep. Archives: SDM2008-49 |
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| Abstract | (in Japanese) | (See Japanese page) |
| (in English) | Introduction of III-V semiconductors to the n channel of CMOS devices is one of the options to sustain performance improvements in the hp22 nm node and beyond. In this study, we chose HfO2/GaAs as the model system of the high-k/III-V interfaces and examined the electrical properties of the direct contact HfO2/GaAs interfaces that were intentionally composed of either Ga-O or As-O bonds. We also investigated the effects of an ultrathin epitaxial Ge interface layer on the electrical properties. It has been found that the electrical properties are strongly dependent on the type of the interface bonds. Ge insertion is effective to reduce the frequency dispersion of the C-V characteristics, provided that surface segregation of the As and Ga atoms to the Ge surface is suppressed. | |
| Keyword | (in Japanese) | (See Japanese page) |
| (in English) | III-V semiconductors / High-k dielectrics / GaAs / HfO2 / Ge / C-V characteristics / Fermi level pinning / surface reconstruction | |
| Reference Info. | IEICE Tech. Rep., vol. 108, no. 80, SDM2008-49, pp. 41-46, June 2008. | |
| Paper # | SDM2008-49 | |
| Date of Issue | 2008-06-02 (SDM) | |
| ISSN | Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 | |
| Copyright and reproduction |
All rights are reserved and no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher. Notwithstanding, instructors are permitted to photocopy isolated articles for noncommercial classroom use without fee. (License No.: 10GA0019/12GB0052/13GB0056/17GB0034/18GB0034) | |
| Download PDF | SDM2008-49 Link to ES Tech. Rep. Archives: SDM2008-49 |
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| Conference Information | |
| Committee | SDM |
| Conference Date | 2008-06-09 - 2008-06-10 |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | An401・402, Inst. Indus. Sci., The Univ. of Tokyo |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | Science and Sci. & Technol. for Thin Dielectrics for MIS Devices |
| Paper Information | |
| Registration To | SDM |
| Conference Code | 2008-06-SDM |
| Language | Japanese |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Gate Dielectrics Interface Control for III-V MISFET |
| Sub Title (in English) | |
| Keyword(1) | III-V semiconductors |
| Keyword(2) | High-k dielectrics |
| Keyword(3) | GaAs |
| Keyword(4) | HfO2 |
| Keyword(5) | Ge |
| Keyword(6) | C-V characteristics |
| Keyword(7) | Fermi level pinning |
| Keyword(8) | surface reconstruction |
| 1st Author's Name | Tetsuji Yasuda |
| 1st Author's Affiliation | National Institute of Advanced Industrial Science and Technology (AIST) |
| 2nd Author's Name | Noriyuki Miyata |
| 2nd Author's Affiliation | National Institute of Advanced Industrial Science and Technology (AIST) |
| 3rd Author's Name | Akihiro Ohtake |
| 3rd Author's Affiliation | National Institute for Materials Science (NIMS) |
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| Speaker | Author-1 |
| Date Time | 2008-06-10 09:55:00 |
| Presentation Time | 25 minutes |
| Registration for | SDM |
| Paper # | SDM2008-49 |
| Volume (vol) | vol.108 |
| Number (no) | no.80 |
| Page | pp.41-46 |
| #Pages | 6 |
| Date of Issue | 2008-06-02 (SDM) |
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