Paper Abstract and Keywords |
Presentation |
2008-04-17 13:05
[Invited Talk]
Embedded DRAM Technology for Consumer Electronics Hiroki Shirai, Ryousuke Ishikawa, Yuichi Itoh, Takuya Kitamura, Mami Takeuchi, Takashi Sakoh, Ken Inoue, Tohru Kawasaki, Nobuyuki Katsuki, Hiroyuki Hoshizaki, Shinichi Kuwabara, Hidetaka Natsume, Masato Sakao, Takaho Tanigawa (NEC Electronics) ICD2008-4 Link to ES Tech. Rep. Archives: ICD2008-4 |
Abstract |
(in Japanese) |
(See Japanese page) |
(in English) |
This paper presents embedded DRAM device technology utilizing stacked MIM(Metal-Insulator-Metal) capacitor. Targeted for high random-access performance as well as low-power data-streaming applications, original structure named “Full Metal DRAM” has been devised and implemented from 150nm generation. This features reduced parasitic resistance of DRAM cell and fully-compatible CMOS Trs. characteristics with that of leading-edge CMOS. In 90nm generation, ZrO2 is introduced as capacitor dielectric material for cell size reduction. For the next generation of 55nm and beyond, high-k gate dielectric (HfSiON) has been introduced in CMOS platform, which can be effectively exploited for embedded DRAM scaling and performance improvement. |
Keyword |
(in Japanese) |
(See Japanese page) |
(in English) |
embedded DRAM / MIM Capacitor / High-k / ZrO2 / HfSiON / / / |
Reference Info. |
IEICE Tech. Rep., vol. 108, no. 6, ICD2008-4, pp. 19-24, April 2008. |
Paper # |
ICD2008-4 |
Date of Issue |
2008-04-10 (ICD) |
ISSN |
Print edition: ISSN 0913-5685 Online edition: ISSN 2432-6380 |
Copyright and reproduction |
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ICD2008-4 Link to ES Tech. Rep. Archives: ICD2008-4 |
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